356
CHAPTER 18 8-/10-BIT A/D CONVERTER
18.3.5
Analog Input Enable Register (ADER5, ADER6)
The analog input enable register enables or disables the analog input pins to be used in
the 8-/10-bit A/D converter.
■
Analog Input Enable Register (ADER5, ADER 6)
Figure 18.3-6 Analog Input Enable Register (ADER5 to 6)
ADE15 to ADE8
0
1
Analog input disable
Analog input enable
Analog input enable bit
15 to 8 (AN15 to AN8)
Reset value
1 1 1 1 1 1 1 1
B
Address
ADER5
00000B
H
bit15 to bit8
R/W
ADE8
ADE9
ADE10
ADE11
ADE12
ADE13
ADE14
ADE15
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ADE7 to ADE0
0
1
Analog input disable
Analog input enable
Analog input enable bit
7 to 0 (AN7 to AN0)
Reset value
1 1 1 1 1 1 1 1
B
Address
ADER6
00000C
H
4
5
3
2
1
0
bit7 to bit0
R/W
ADE0
ADE1
ADE2
ADE3
ADE4
ADE5
ADE6
ADE7
R/W
R/W
R/W
R/W
R/W
R/W
R/W
6
7
12
13
11
10
9
8
14
15
: Read/Write
: Reset value
Table 18.3-8 Functions of Port 5 Analog Input Enable Register (ADER5)
Bit Name
Function
bit15
to
bit8
ADE15 to ADE8:
Analog input enable
bits 15 to 8
These bits enable or disable the analog input pin (AN15 to AN8) of
A/D conversion arranged on port 5.
When set to "0": Disables analog input
When set to "1": Enables analog input
Table 18.3-9 Functions of Port 6 Analog Input Enable Register (ADER6)
Bit Name
Function
bit0
to
bit7
ADE7 to ADE0:
Analog input enable
bits 7 to 0
These bits enable or disable the analog input pin (AN7 to AN0) of A/
D conversion arranged on port 6.
When set to "0": Disables analog input
When set to "1": Enables analog input
Summary of Contents for F2MCTM-16LX
Page 2: ......
Page 3: ...FUJITSU LIMITED F2MCTM 16LX 16 BIT MICROCONTROLLER MB90360 Series HARDWARE MANUAL ...
Page 4: ......
Page 42: ...26 CHAPTER 1 OVERVIEW ...
Page 70: ...54 CHAPTER 2 CPU ...
Page 134: ...118 CHAPTER 6 CLOCK SUPERVISOR ...
Page 176: ...160 CHAPTER 8 LOW POWER CONSUMPTION MODE ...
Page 194: ...178 CHAPTER 10 I O PORTS ...
Page 252: ...236 CHAPTER 13 16 Bit I O TIMER ...
Page 282: ...266 CHAPTER 14 16 BIT RELOAD TIMER ...
Page 296: ...280 CHAPTER 15 WATCH TIMER ...
Page 386: ...370 CHAPTER 18 8 10 BIT A D CONVERTER ...
Page 426: ...410 CHAPTER 20 LIN UART Figure 20 5 2 ORE Flag Set Timing RDRF ORE Reception data ...
Page 540: ...524 CHAPTER 22 ADDRESS MATCH DETECTION FUNCTION ...
Page 568: ...552 CHAPTER 24 512K BIT FLASH MEMORY ...
Page 633: ...617 APPENDIX B Instructions Table B 9 3 Bit Operation Instruction Map first byte 6CH ...
Page 634: ...618 APPENDIX Table B 9 4 Character String Operation Instruction Map first byte 6EH ...
Page 637: ...621 APPENDIX B Instructions Table B 9 7 ea Instruction 2 first byte 71H ...
Page 638: ...622 APPENDIX Table B 9 8 ea Instruction 3 first byte 72H ...
Page 639: ...623 APPENDIX B Instructions Table B 9 9 ea Instruction 4 first byte 73H ...
Page 640: ...624 APPENDIX Table B 9 10 ea Instruction 5 first byte 74H ...
Page 641: ...625 APPENDIX B Instructions Table B 9 11 ea Instruction 6 first byte 75H ...
Page 642: ...626 APPENDIX Table B 9 12 ea Instruction 7 first byte 76H ...
Page 643: ...627 APPENDIX B Instructions Table B 9 13 ea Instruction 8 first byte 77H ...
Page 644: ...628 APPENDIX Table B 9 14 ea Instruction 9 first byte 78H ...
Page 645: ...629 APPENDIX B Instructions Table B 9 15 MOVEA RWi ea Instruction first byte 79H ...
Page 646: ...630 APPENDIX Table B 9 16 MOV Ri ea Instruction first byte 7AH ...
Page 647: ...631 APPENDIX B Instructions Table B 9 17 MOVW RWi ea Instruction first byte 7BH ...
Page 648: ...632 APPENDIX Table B 9 18 MOV Ri ea Instruction first byte 7CH ...
Page 649: ...633 APPENDIX B Instructions Table B 9 19 MOVW ea Rwi Instruction first byte 7DH ...
Page 650: ...634 APPENDIX Table B 9 20 XCH Ri ea Instruction first byte 7EH ...
Page 651: ...635 APPENDIX B Instructions Table B 9 21 XCHW RWi ea Instruction first byte 7FH ...
Page 664: ...648 APPENDIX ...
Page 665: ...649 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 682: ......