568
APPENDIX
APPENDIX A
I/O Maps
Table A-1 lists addresses to be assigned to the registers in the peripheral blocks.
■
I/O Maps (00XX Addresses)
Table A-1 I/O Map (1/5)
Address
Register
Abbreviation
Access
Peripheral
Initial value
000000
H
to
000001
H
Reserved
000002
H
Port 2 data register
PDR2
R/W
Port 2
XXXXXXXX
B
000003
H
Reserved
000004
H
Port 4 data register
PDR4
R/W
Port 4
XXXXXXXX
B
000005
H
Port 5 data register
PDR5
R/W
Port 5
XXXXXXXX
B
000006
H
Port 6 data register
PDR6
R/W
Port 6
XXXXXXXX
B
000007
H
Reserved
000008
H
Port 8 data register
PDR8
R/W
Port 8
XXXXXXXX
B
000009
H
to
00000A
H
Reserved
00000B
H
Analog input enable port 5
ADER5
R/W
Port 5, A/D
1 1 1 1 1 1 1 1
B
00000C
H
Analog input enable port 6
ADER6
R/W
Port 6, A/D
1 1 1 1 1 1 1 1
B
00000D
H
Reserved
00000E
H
Input level select register0
ILSR0
R/W
Ports
XXXXXXXX
B
00000F
H
Input level select register1
ILSR1
R/W
Ports
XXXXXXXX
B
000010
H
Reserved
000011
H
000012
H
Port 2 direction register
DDR2
R/W
Port 2
0 0 0 0 0 0 0 0
B
000013
H
Reserved
000014
H
Port 4 direction register
DDR4
R/W
Port 4
XXX 0 0 0 0 0
B
000015
H
Port 5 direction register
DDR5
R/W
Port 5
0 0 0 0 0 0 0 0
B
000016
H
Port 6 direction register
DDR6
R/W
Port 6
0 0 0 0 0 0 0 0
B
000017
H
Reserved
000018
H
Port 8 direction register
DDR8
R/W
Port 8
0 0 0 0 0 0 X 0
B
Summary of Contents for F2MCTM-16LX
Page 2: ......
Page 3: ...FUJITSU LIMITED F2MCTM 16LX 16 BIT MICROCONTROLLER MB90360 Series HARDWARE MANUAL ...
Page 4: ......
Page 42: ...26 CHAPTER 1 OVERVIEW ...
Page 70: ...54 CHAPTER 2 CPU ...
Page 134: ...118 CHAPTER 6 CLOCK SUPERVISOR ...
Page 176: ...160 CHAPTER 8 LOW POWER CONSUMPTION MODE ...
Page 194: ...178 CHAPTER 10 I O PORTS ...
Page 252: ...236 CHAPTER 13 16 Bit I O TIMER ...
Page 282: ...266 CHAPTER 14 16 BIT RELOAD TIMER ...
Page 296: ...280 CHAPTER 15 WATCH TIMER ...
Page 386: ...370 CHAPTER 18 8 10 BIT A D CONVERTER ...
Page 426: ...410 CHAPTER 20 LIN UART Figure 20 5 2 ORE Flag Set Timing RDRF ORE Reception data ...
Page 540: ...524 CHAPTER 22 ADDRESS MATCH DETECTION FUNCTION ...
Page 568: ...552 CHAPTER 24 512K BIT FLASH MEMORY ...
Page 633: ...617 APPENDIX B Instructions Table B 9 3 Bit Operation Instruction Map first byte 6CH ...
Page 634: ...618 APPENDIX Table B 9 4 Character String Operation Instruction Map first byte 6EH ...
Page 637: ...621 APPENDIX B Instructions Table B 9 7 ea Instruction 2 first byte 71H ...
Page 638: ...622 APPENDIX Table B 9 8 ea Instruction 3 first byte 72H ...
Page 639: ...623 APPENDIX B Instructions Table B 9 9 ea Instruction 4 first byte 73H ...
Page 640: ...624 APPENDIX Table B 9 10 ea Instruction 5 first byte 74H ...
Page 641: ...625 APPENDIX B Instructions Table B 9 11 ea Instruction 6 first byte 75H ...
Page 642: ...626 APPENDIX Table B 9 12 ea Instruction 7 first byte 76H ...
Page 643: ...627 APPENDIX B Instructions Table B 9 13 ea Instruction 8 first byte 77H ...
Page 644: ...628 APPENDIX Table B 9 14 ea Instruction 9 first byte 78H ...
Page 645: ...629 APPENDIX B Instructions Table B 9 15 MOVEA RWi ea Instruction first byte 79H ...
Page 646: ...630 APPENDIX Table B 9 16 MOV Ri ea Instruction first byte 7AH ...
Page 647: ...631 APPENDIX B Instructions Table B 9 17 MOVW RWi ea Instruction first byte 7BH ...
Page 648: ...632 APPENDIX Table B 9 18 MOV Ri ea Instruction first byte 7CH ...
Page 649: ...633 APPENDIX B Instructions Table B 9 19 MOVW ea Rwi Instruction first byte 7DH ...
Page 650: ...634 APPENDIX Table B 9 20 XCH Ri ea Instruction first byte 7EH ...
Page 651: ...635 APPENDIX B Instructions Table B 9 21 XCHW RWi ea Instruction first byte 7FH ...
Page 664: ...648 APPENDIX ...
Page 665: ...649 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 682: ......