Freescale Semiconductor MC9S08PT60, Reference Manual

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FTMx_OUTMASK field descriptions (continued)
Field Description
0 Channel output is not masked. It continues to operate normally.
1 Channel output is masked. It is forced to its inactive state.
2
CH2OM
Channel 2 Output Mask
Defines if the channel output is masked (forced to its inactive state) or unmasked (it continues to operate
normally).
0 Channel output is not masked. It continues to operate normally.
1 Channel output is masked. It is forced to its inactive state.
1
CH1OM
Channel 1 Output Mask
Defines if the channel output is masked (forced to its inactive state) or unmasked (it continues to operate
normally).
0 Channel output is not masked. It continues to operate normally.
1 Channel output is masked. It is forced to its inactive state.
0
CH0OM
Channel 0 Output Mask
Defines if the channel output is masked (forced to its inactive state) or unmasked (it continues to operate
normally).
0 Channel output is not masked. It continues to operate normally.
1 Channel output is masked. It is forced to its inactive state.
12.3.18 Function for Linked Channels (FTMx_COMBINEn)
This register contains the control bits used to configure the fault control, synchronization,
deadtime, dual edge capture mode, complementary, and combine features of channels (n)
and (n+1).
• COMBINE0 supports channels 0 and 1.
• COMBINE1 supports channels 2 and 3.
• COMBINE2 supports channels 4 and 5.
NOTE
The channel (n) is the even channel and the channel (n+1) is the
odd channel of a pair of channels.
Address: Base a 1Eh (1d × i), where i=0d to 2d
Bit 7 6 5 4 3 2 1 0
Read 0
FAULTEN SYNCEN DTEN DECAP DECAPEN COMP COMBINE
Write
Reset 0 0 0 0 0 0 0 0
Chapter 12 FlexTimer Module (FTM)
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
Freescale Semiconductor, Inc. 325