Freescale Semiconductor MC9S08PT60, Reference Manual

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In output compare mode, the FTM can generate timed pulses with programmable
position, polarity, duration, and frequency. When the counter matches the value in the
CnVH:CnVL registers of an output compare channel, the channel (n) output can be set,
cleared, or toggled.
When a channel is initially configured to toggle mode, the previous value of the channel
output is held until the first output compare event occurs.
The CHnF bit is set and the channel (n) interrupt is generated (if CHnIE = 1) at the
channel (n) match (FTM counter = CnVH:CnVL).
TOF bit
... ... 0 1 1 1 2 2 3 3 4 4 5 5 0 0
previous value
previous value
channel (n) output
counter
overflow
counter
overflow
counter
overflow
channel (n)
match
channel (n)
match
CNTH:L
MODH:L = 0x0005
CnVH:L = 0x0003
CHnF bit
Figure 12-196. Example of the output compare mode when the match toggles the
channel output
TOF bit
... ... 0 1 1 1 2 2 3 3 4 4 5 5 0 0
previous value
previous value
channel (n) output
counter
overflow
counter
overflow
counter
overflow
channel (n)
match
channel (n)
match
CNTH:L
MODH:L = 0x0005
CnVH:L = 0x0003
CHnF bit
Figure 12-197. Example of the output compare mode when the match clears the channel
output
channel (n) output
CHnF bit
TOF bit
CNTH:L
MODH:L = 0x0005
CnVH:L = 0x0003
counter
overflow
channel (n)
match
counter
overflow
channel (n)
match
counter
overflow
... 0 1 2 3 4 5 0 1 2 3 4 5 0 1 ...
previous value
previous value
Figure 12-198. Example of the output compare mode when the match sets the channel
output
Chapter 12 FlexTimer Module (FTM)
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
Freescale Semiconductor, Inc. 345