5.4.1 IPC Status and Control Register (IPC_SC)
This register contains status and control bits for the IPC.
Address: 3Eh base + 0h offset = 3Eh
Bit
7
6
5
4
3
2
1
0
Read
0
Write
Reset
0
0
1
0
0
0
0
0
IPC_SC field descriptions
Field
Description
7
IPCE
Interrupt Priority Controller Enable
This bit enables/disables the interrupt priority controller module.
0
Disables IPCE. Interrupt generated from the interrupt source is passed directly to CPU without
processing (bypass mode). The IPMPS register is not updated when the module is disabled.
1
Enables IPCE and interrupt generated from the interrupt source is processed by IPC before passing to
CPU.
6
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
5
PSE
Pseudo Stack Empty
This bit indicates that the pseudo stack has no valid information. This bit is automatically updated after
each IPMPS register push or pull operation.
4
PSF
Pseudo Stack Full
This bit indicates that the pseudo stack register IPMPS register is full. It is automatically updated after
each IPMPS register push or pull operation. If additional interrupt is nested after this bit is set, the earliest
interrupt mask value(IPM0[1:0]) stacked in IPMPS will be lost.
0
IPMPS register is not full.
1
IPMPS register is full.
3
PULIPM
Pull IPM from IPMPS
This bit pulls stacked IPM value from IPMPS register to IPM bits of IPCSC. Zeros are shifted into bit
positions 1 and 0 of IPMPS.
0
No operation.
1
Writing 1 to this bit causes a 2-bit value from the interrupt priority mask pseudo stack register to be
pulled to the IPM bits of IPCSC to restore the previous IPM value.
2
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
IPM
Interrupt Priority Mask
This field sets the mask for the interrupt priority control. If the interrupt priority controller is enabled, the
interrupt source with an interrupt level (ILRxx) value that is greater than or equal to the value of IPM will be
presented to the CPU. Writes to this field are allowed, but doing this will not push information to the
Table continues on the next page...
Interrupt priority control register
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
134
Freescale Semiconductor, Inc.
Summary of Contents for MC9S08PT60
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