Freescale Semiconductor MC9S08PT60, Reference Manual

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Motor control and power conversion features have been added through a dedicated set of
registers. The new features, such as hardware dead time insertion, polarity, fault control,
and masking, greatly reduce loading on the execution software and are usually each
controlled by a group of registers. All of the new features are disabled after reset by
default.
Flextimer input triggers can come directly from other modules integrated on the chip,
such as comparators or ADCs, to automatically initiate timer functions. These triggers
can be linked in a variety of ways during integration of the modules so please note
carefully the options available for used FlexTimer configuration.
All main user access registers are buffered to ease the load on the executing software. A
number of trigger options exist to determine which registers are updated with this user
defined data.
12.1.2 Features
The FTM features include:
• Selectable FTM source clock:
• Source clock can be the system clock, the fixed frequency clock, or an external
clock
• Fixed frequency clock is an additional clock input to allow the selection of an on
chip clock source other than the system clock
• Selecting external clock connects FTM clock to a chip level input pin therefore
allowing to synchronize the FTM counter with an off chip clock source
• Prescaler divide-by 1, 2, 4, 8, 16, 32, 64, or 128
• FTM has a 16-bit counter
• It can be a free-running counter or a counter with initial and final value
• The counting can be up or up-down
• Each channel can be configured for input capture, output compare, or edge-aligned
PWM mode
• In input capture mode:
• The capture can occur on rising edges, falling edges or both edges
• An input filter can be selected for some channels
Introduction
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
300 Freescale Semiconductor, Inc.