Freescale Semiconductor MC9S08PT60, Reference Manual

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FTM counter
... ...
FTM counting is up
TOF bit
0x0005 0x0015 0x0016 0xFFFE 0xFFFF 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0015 0x0016
MODH:L = 0x0005
CNTINH:L = 0x0015
load of CNTINH:L
set TOF bit set TOF bit
load of CNTINH:L
Figure 12-190. Example of up counting when the value of CNTIN registers is greater
than the value of MOD registers
12.4.3.2 Up-down counting
Up-down counting is selected when (CPWMS = 1).
CNTINH:L defines the starting value of the count and MODH:L defines the final value
of the count. The value of CNTINH:L is loaded into the FTM counter, and the counter
increments until the value of MODH:L is reached, at which point the counter is
decremented until it returns to the value of CNTINH:L and the up-down counting
restarts.
The FTM period when using up-down counting is 2 × (MODH:L – CNTINH:L) × period
of the FTM counter clock.
The TOF bit is set when the FTM counter changes from MODH:L to (MODH:L – 1).
If (CNTINH:L = 0x0000), the FTM counting is equivalent to TPM up-down counting;
that is, up-down and unsigned counting. See the following figure.
Functional Description
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
340 Freescale Semiconductor, Inc.