A conversion complete event sets the ADC_SC1[COCO] and generates an ADC interrupt
to wake the MCU from Stop3 mode if the ADC interrupt is enabled (ADC_SC1[AIEN] =
1). In fifo mode, ADC cannot complete the conversion operation fully or wake the MCU
from Stop3 mode.
Note
The ADC module can wake the system from low-power stop
and cause the MCU to begin consuming run-level currents
without generating a system level interrupt. To prevent this
scenario, the data transfer blocking mechanism must be cleared
when entering Stop3 and continuing ADC conversions.
19.5 Initialization information
This section gives an example that provides some basic direction on how to initialize and
configure the ADC module. You can configure the module for 8-, 10-, or 12-bit
resolution, single or continuous conversion, and a polled or interrupt approach, among
many other options. Refer to ADC_SC3 register for information used in this example.
Note
Hexadecimal values prefixed by a 0x, binary values prefixed by
a %, and decimal values have no preceding character.
19.5.1 ADC module initialization example
Before the ADC module can be used to complete conversions, it must be initialized.
Given below is a method to initialize ADC module.
19.5.1.1 Initialization sequence
A typical initialization sequence is as follows:
1. Update the configuration register (ADC_SC3) to select the input clock source and the
divide ratio used to generate the internal clock, ADCK. This register is also used for
selecting sample time and low-power configuration.
2. Update status and control register 2 (ADC_SC2) to select the hardware or software
conversion trigger and compare function options, if enabled.
Chapter 19 Analog-to-digital converter (ADC)
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
Freescale Semiconductor, Inc.
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