Freescale Semiconductor MC9S08PT60, Reference Manual

Page: 670 / 679

25.4.4.3 Trigger modes
The on-chip ICE system supports nine trigger modes. The trigger mode is used as a
qualifier for either starting or ending the storing of data in the FIFO. When the match
condition is met, the appropriate flag AF or BF is set in DBG_S register. Arming the
DBG module clears the DBG_S[AF], DBG_S[BF], and DBG_S[CF] flags. In all trigger
modes except for the event only modes change of flow addresses are stored in the FIFO.
In the event only modes only the value on the data bus at the trigger event B comparator
match address will be stored.
25.4.4.3.1 A only
In the A only trigger mode, if the match condition for A is met, the DBG_S[AF] flag is
set.
25.4.4.3.2 A or B
In the A or B trigger mode, if the match condition for A or B is met, the corresponding
flag(s) in the DBG_S register are set.
25.4.4.3.3 A then B
In the A then B trigger mode, the match condition for A must be met before the match
condition for B is compared. When the match condition for A or B is met, the
corresponding flag in the DBG_S register is set.
25.4.4.3.4 Event only B
In the event only B trigger mode, if the match condition for B is met, the DBG_S[BF]
flag is set. The event only B trigger mode is considered a begin-trigger type and the
DBG_T[BEGIN] bit is ignored.
25.4.4.3.5 A then event only B
In the A then event only B trigger mode, the match condition for A must be met before
the match condition for B is compared. When the match condition for A or B is met, the
corresponding flag in the DBG_S register is set. The A then event only B trigger mode is
considered a begin-trigger type and the DBG_T[BEGIN] bit is ignored.
Functional description
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
670 Freescale Semiconductor, Inc.