Freescale Semiconductor MC9S08PT60, Reference Manual

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I2C_SMB field descriptions (continued)
Field Description
2
SHTF1
SCL High Timeout Flag 1
This read-only bit sets when SCL and SDA are held high more than clock × LoValue / 512, which indicates
the bus is free. This bit is cleared automatically.
0 No SCL high and SDA high timeout occurs
1 SCL high and SDA high timeout occurs
1
SHTF2
SCL High Timeout Flag 2
This bit sets when SCL is held high and SDA is held low more than clock × LoValue / 512. Software clears
this bit by writing 1 to it.
0 No SCL high and SDA low timeout occurs
1 SCL high and SDA low timeout occurs
0
SHTF2IE
SHTF2 Interrupt Enable
Enables SCL high and SDA low timeout interrupt.
0 SHTF2 interrupt is disabled
1 SHTF2 interrupt is enabled
18.3.10 I2C Address Register 2 (I2C_A2)
Address: 3070h base + 9h offset = 3079h
Bit 7 6 5 4 3 2 1 0
Read
SAD
0
Write
Reset 1 1 0 0 0 0 1 0
I2C_A2 field descriptions
Field Description
7–1
SAD
SMBus Address
Contains the slave address used by the SMBus. This field is used on the device default address or other
related addresses.
0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
18.3.11 I2C SCL Low Timeout Register High (I2C_SLTH)
Address: 3070h base + Ah offset = 307Ah
Bit 7 6 5 4 3 2 1 0
Read
SSLT[15:8]
Write
Reset 0 0 0 0 0 0 0 0
Chapter 18 Inter-Integrated Circuit (I2C)
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
Freescale Semiconductor, Inc. 519