Citizen CLP-621, Technical Manual

Page: 45 / 217

2-2. Operation of Control Parts
2-33
CLP-621 & CLP-631
(5-2) Reset circuit
This circuit performs the system reset.
When the power is turned ON, +3.3V (VCC) gradually increases from 0V. When the
voltage at pin 5 (+3.3V) of IC3 reaches a certain level, IC3 is activated and the RESET
signal changes from "Low" to "High" level. While the RESET signal is “Low”, the CPU (IC1)
is reset. When the power is turned OFF and +3.3V drops below a certain level, the RESET
signal changes from "High" to "Low" level, and the CPU is reset.
The CPU outputs the GRESET signals to reset the Custom IC (IC11) and other ICs.
GND
+3.3V
3
4
1
Voltage Detector
RESET
RESET
L : Reset
26
IC1
CPU
RESET
IC11
Custom IC
Power ON
Reset
+3.3V
RESET
+3.3V
H
L
0V
P52
GRESET
GRESET
Pin 1 of IC3
IC3
BD5328FVE
P17
C3
T4
RESET
Vout
CT
SUB
2
VDD
5 28
23
C4
(5-3) Clock circuit
Crystal oscillator Y1 oscillates a 16 MHz clock. This clock is send to the CPU (IC1) and the
CPU generates a 128 MHz internal clock and 64 MHz clock.
The 64MHz clock is fed to the Custom IC (IC11).
Oscillator Y2 oscillates a 48 MHz clock used for USB I/F control. It starts oscillation when
UCLKON signal (pin 77) is output from the CPU to Y2.
IC1
CPU
IC11
Custom IC
Y1
R1
C2
System Clock
(16MHz)
P2
P3
BUSCLK
PCD1 88
P132
CLKIN
119
GND
+3.3V
Clock Generator
Clock for USB
(48MHz)
UCLKON
PCT7
Y2
VDD
T1
UCLK
P8
FCXO-03 (48MHz)
STBY
OUT
P20
UCLKON 77
Bus Clock
(64MHz)
Internal Clock
(128MHz)
P10
159
C1
R17
BUSCLK
[Main PCB]
R2
FCX-03 (16MHz)
X1
164
X2
165