5-8
BRC-300/300P
BRU-300/300P
Control System
The control block of BRBK-304 is composed of the SP
CPU IC603 and DV CPU IC606.
The SP CPU IC603 controls the following peripheral LSIs
and issues commands.
.
DV compressor IC206
.
Audio interleave IC301
.
Timing generator IC303
It also outputs the additional information data such as time
code to the i.LINK packet generator IC401 (2/2). Further,
it controls the DV output WIDE_ID flag using the
S1_WIDE signal sent from BRC-300/300P or BRU-300/
300P.
The DV CPU IC606 controls the IEEE1394 controller
IC506, provides transaction service, and handles AV/C
commands received.
Power Supply Circuit
The DC-DC converter IC005 generates
+
3.2 V from the
+
12 V supplied by BRC-300/300P or BRU-300/300P.
Further, the series regulators IC006 and IC201 generate
+
1.5 V and
+
2.5 V respectively from the generated
+
3.2
V.