Preliminary
NAND FLASH CONTROLLER
S3C2451X RISC MICROPROCESSOR
7-8
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
The parity codes have self-correctable information include parity code itself.
4. To generate spare area ECC parity code, set the MsgLength to 1(24-byte message length), and set the
ECCType to “01”(enable 8bit ECC). 8bit ECC module generates the ECC parity code for 24-byte data. In
order to initiating the module, you have to write ‘1’ on the InitMECC (NFCONT[5]) bit after clearing the
MainECCLock (NFCONT[7]) bit to ‘0’(Unlock).
MainECCLock (NFCONT[7]) bit controls whether ECC Parity code is generated or not.
Note. In 8bit ECC, MainECCLock should be cleared before initiating InitMECC.
5. Whenever data is written, the 8bit ECC module generates ECC parity code internally.
6. When you finish writing 24-byte meta or extra data, the parity codes are automatically updated to
NF8MECC0, NFMECC1, NF8MECC2, NF8MECC3 register. You can program these parity codes to spare
area. The parity codes have self-correctable information include parity code itself.
7.10.6 8-BIT ECC PROGRAMMING GUIDE (DECODING)
1. To use 8bit ECC in software mode, set the MsgLength to 0(512-byte message length) and set the ECCType
to “01”(enable 8bit ECC). 8bit ECC module generates ECC parity code for 512-byte read data. In order to
initiating 8bit ECC module, you have to write ‘1’ on the InitMECC (NFCONT[5]) bit after clearing the
MainECCLock (NFCONT[7]) bit to ‘0’(Unlock).
MainECCLock (NFCONT[7]) bit controls whether ECC Parity code is generated or not.
Note. In 8bit ECC, MainECCLock should be cleared before InitMECC
2. Whenever data is read, the MLC ECC module generates ECC parity code internally.
3. After you complete the reading of 512-byte data (not including spare area data), you must set the
MainECCLock (NFCONT[7]) bit to ‘1’(Lock) and have to read parity codes. 8bit ECC module needs parity
codes to detect whether error bits exists or not. So you have to read the ECC parity code of 512-byte main
data right after reading the 512-byte data. Once the ECC parity code is read, 8bit ECC engine starts
searching any error internally. 8bit ECC error searching engine needs minimum 372 cycles to find any error.
During this time, you can continue reading data from external NAND flash memory.
ECCDecDone(NFSTAT[6]) can be used to check whether ECC decoding is completed or not.
4. When ECCDecDone (NFSTAT[6]) is set (‘1’), NF8ECCERR0 indicates whether error bit exists or not. If any
error exists, you can fix it by referencing NF8ECCERR0/1/2 and NFMLC8BITPT0/1 register.
5. If you have more main data to read, continue doing from step 1.
6. For meta data error check, set the MsgLength to 1(24-byte message length) and set the ECCType to
“01”(enable 8bit ECC). ECC module generates the ECC parity code for 24-byte data. In order to initiating the
8bit ECC module, you have to write ‘1’ on the InitMECC (NFCONT[5]) bit after clearing the MainECCLock
(NFCONT[7]) bit to ‘0’(Unlock).
MainECCLock (NFCONT[7]) bit controls whether ECC Parity code is generated or not.
7. Whenever data is read, the 8bit ECC module generates ECC parity code internally.
8. After you complete reading 24-byte, you must set the MainECCLock (NFCONT[7]) bit to ‘1’(Lock) and read
the parity code for 24-byte data. MLC ECC module needs parity codes to detect whether error bits exists or
not. So you have to read ECC parity codes right after reading 24-byte data. Once ECC parity code is read,
8bit ECC engine starts searching any error internally. 8bit ECC error searching engine needs minimum 372
