Direct Memory Access Controller (DMAC)
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135
StatusDstTran
0x300
R
0x0
Status for IntDstTran Interrupt
Reg Exist:
Yes
StatusErr
0x308
R
0x0
Status for IntErr Interrupt
Reg Exist:
Yes
MaskBlock, MaskDstTran, MaskErr, MaskSrcTran, MaskTfr
MaskTfr
0x310
R/W
0x0
Mask for IntTfr Interrupt
Reg Exist:
Yes
MaskBlock
0x318
R/W
0x0
Mask for IntBlock Interrupt
Reg Exist:
Yes
MaskSrcTran
0x320
R/W
0x0
Mask for IntSrcTran Interrupt
Reg Exist:
Yes
MaskDstTran
0x328
R/W
0x0
Mask for IntDstTran Interrupt
Reg Exist:
Yes
MaskErr
0x330
R/W
0x0
Mask for IntErr Interrupt
Reg Exist:
Yes
ClearBlock, ClearDstTran, ClearErr, ClearSrcTran, ClearTfr
ClearTfr
0x338
W
0x0
Clear for IntTfr Interrupt
Reg Exist:
Yes
ClearBlock
0x340
W
0x0
Clear for IntBlock Interrupt
Reg Exist:
Yes
ClearSrcTran
0x348
W
0x0
Clear for IntSrcTran Interrupt
Reg Exist:
Yes
ClearDstTran
0x350
W
0x0
Clear for IntDstTran Interrupt
Reg Exist:
Yes
ClearErr
0x358
W
0x0
Clear for IntErr Interrupt
Reg Exist:
Yes
StatusInt
0x360
W
0x0
Status for each interrupt type
Reg Exist:
Yes
Miscellaneous Registers
DmaCfgReg
0x398
R/W
0x0
DMA Configuration Register
Reg Exist:
Yes
ChEnReg
0x3a0
R/W
0x0
DMA Channel Enable Register
Reg Exist:
Yes
DmaIdReg
0x3a8
R
0x0
DMA ID Register
Reg Exist:
Yes
DmaTestReg
0x3b0
R/W
0x0
DMA Test Register
Reg Exist:
Yes
Reserved
0x3b8
N/A
-
Reserved
Reserved
0x3c0
N/A
-
Reserved
DMA_COMP_P
ARAMS_6
0x3c8
R
Depends on user
configuration
Refer to the bit table in the description for
DMA_COMP_PARAMS_6.
Reg Exist:
Dependent on setting of
DMAH_ADD_ENCODED_PARAMS configuration parameter.
The register exists when this parameter is set to True.
DMA_COMP_P
ARAMS_5
0x3d0
R
Depends on user
configuration
Refer to the bit table in the description for
DMA_COMP_PARAMS_5.
Reg Exist:
Dependent on setting of
DMAH_ADD_ENCODED_PARAMS configuration parameter.
The register exists when this parameter is set to True.
DMA_COMP_P
ARAMS_4
0x3d8
R
Depends on user
configuration
Refer to the bit table in the description for
DMA_COMP_PARAMS_4.
Reg Exist:
Dependent on setting of
DMAH_ADD_ENCODED_PARAMS configuration parameter.
The register exists when this parameter is set to True.
DMA_COMP_P
ARAMS_3
0x3e0
R
Depends on user
configuration
Refer to the bit table in the description for
DMA_COMP_PARAMS_3.
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2019-05-15 10:08:03