CHAPTER 1 INTRODUCTION
User’s Manual U13850EJ6V0UD
64
{
Watch timer
When operating under subclock or main clock: 1 channel
Operation using the subclock or main clock is also possible in the IDLE mode.
{
Watchdog timer
1 channel
{
Serial interface (SIO)
Asynchronous serial interface (UART)
Clocked serial interface (CSI)
I
2
C bus interface (I
2
C)
(only for
µ
PD703034BY, 703035BY, 703036HY, 703037HY, 70F3035BY, 70F3036HY,
and 70F3037HY)
8-/16-bit variable-length serial interface
CSI/UART:
2 channels
CSI/I
2
C:
2 channels
CSI (8-/16-bit valuable):
1 channel
Dedicated baud rate generator: 3 channels
{
A/D converter
10-bit resolution: 12 channels
{
DMA controller
Internal RAM
←→
on-chip peripheral I/O: 6 channels
{
Real-time output port (RTP)
8 bits
×
1 channel or 4 bits
×
2 channels
{
ROM correction
Modifiable 4 points
{
Regulator
4.0 V to 5.5 V input
→
internal 3.0 V
{
Key return function
4 to 8 selecting enabled, falling edge fixed
{
Clock generator
During main clock or subclock operation
5-level CPU clock (including sub operations)
{
Power-saving functions
HALT/IDLE/STOP modes
{
IEBus controller
1 ch
{
Package
100-pin plastic LQFP (fine pitch, 14
×
14)
100-pin plastic QFP (14
×
20)
{
CMOS structure
All static circuits
1.5.2 Application fields (V850/SB2 (B and H versions))
AV equipment
Example
: Audio, car audio equipment, VCR, and TV.
Содержание V850/SB1
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