CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION
User’s Manual U13850EJ6V0UD
163
After reset: 47H
R/W
Address: FFFFF100H to FFFFF156H
Symbol
<7>
<6>
5
4
3
2
1
0
xxICn
xxIFn
xxMKn
0
0
0
xxPRn2
xxPRn1
xxPRn0
xxIFn
Interrupt request flag
Note
0
Interrupt request not generated
1
Interrupt request generated
xxMKn
Interrupt mask flag
0
Interrupt servicing enabled
1
Interrupt servicing disabled (pending)
xxPRn2
xxPRn1
xxPRn0
Interrupt priority specification bit
0
0
0
Specifies level 0 (highest)
0
0
1
Specifies level 1
0
1
0
Specifies level 2
0
1
1
Specifies level 3
1
0
0
Specifies level 4
1
0
1
Specifies level 5
1
1
0
Specifies level 6
1
1
1
Specifies level 7 (lowest)
Note
Automatically reset by hardware when an interrupt request is acknowledged.
Remark
xx: Identification name of each peripheral unit (see
Table 5-2
)
n:
Peripheral unit number (see
Table 5-2
)
Содержание V850/SB1
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