APPENDIX D INDEX
User’s Manual U13850EJ6V0UD
660
I
2
C bus mode ------------------------------------------------ 275
I
2
C interrupt request --------------------------------------- 299
IC -----------------------------------------------------------------91
ID flag ---------------------------------------------------------- 165
IDLE mode -------------------------------------------- 188, 192
Idle state insertion function ------------------------------ 134
IEBIC1 -----------------------------------------------162 to 164
IEBIC2 -----------------------------------------------162 to 164
IEBus clock selection register -------------------------- 582
IEBus communication count register ----------------- 582
IEBus control data register ------------------------------ 565
IEBus control register ------------------------------------- 561
IEBus controller -------------------------------------------- 541
IEBus data register ---------------------------------------- 571
IEBus high-speed clock selection register ----------- 583
IEBus interrupt status register -------------------------- 575
IEBus partner address register ------------------------- 565
IEBus slave address register -------------------- 433, 564
IEBus slave status register ------------------------------ 580
IEBus success count register --------------------------- 581
IEBus telegraph length register ------------------------ 569
IEBus unit address register ----------------------------- 564
IEBus unit status register -------------------------------- 572
IECLK --------------------------------------------------------- 582
IEHCLK-------------------------------------------------------- 583
IERX -------------------------------------------------------------89
IETX -------------------------------------------------------------89
IIC clock expansion registers 0, 1 -------------- 289, 350
IIC clock selection registers 0, 1 ---------------- 288, 349
IIC control registers 0, 1 ---------------------------------- 339
IIC flag registers 0, 1--------------------------------------- 347
IIC function expansion registers 0, 1 ----------- 289, 350
IIC shift registers 0, 1 ------------------------------------- 278
IIC status registers 0, 1 ---------------------------- 285, 344
IIC0, IIC1 --------------------------------------- 278, 291, 351
IICC0, IICC1 ------------------------------------------ 280, 339
IICCE0, IICCE1 -------------------------------------- 289, 350
IICCL0, IICCL1 -------------------------------------- 288, 349
IICF0, IICF1 -------------------------------------------------- 347
IICIC1 ------------------------------------------------162 to 164
IICS0, IICS1 ------------------------------------------ 285, 344
IICX0, IICX1 ------------------------------------------ 289, 350
Illegal opcode ----------------------------------------------- 171
Image --------------------------------------------------------- 104
In-service priority register -------------------------------- 165
INTC ------------------------------------------------------- 40, 50
Integral linearity error -------------------------------------- 450
Internal RAM area ----------------------------------------- 110
Internal ROM area ----------------------------------------- 107
Interrupt control register ------------------------ 162 to 164
Interrupt controller -------------------------------------- 40, 50
Interrupt request signal generator --------------------- 279
Interrupt source register ----------------------------------- 99
Interrupt status saving register --------------------------- 99
Interrupt/exception processing function ------------- 146
Interval timer mode ---------------------------------------- 261
INTP0 to INTP6 ---------------------------------------------- 81
ISPR ---------------------------------------------------------- 165
ISR ------------------------------------------------------------ 575
[K]
Key interrupt function ------------------------------------- 180
Key return mode register -------------------------------- 180
KR0 to KR7 --------------------------------------------------- 89
KRIC ------------------------------------------------- 162 to 164
KRM ----------------------------------------------------------- 180
[L]
LBEN ----------------------------------------------------------- 87
Low power consumption mode ------------------------ 443
[M]
Main clock oscillator -------------------------------------- 182
MAM ---------------------------------------------------------- 116
Maskable interrupt ---------------------------------------- 155
Memory address output mode register -------------- 116
Memory block function ----------------------------------- 131
Memory boundary operation condition --------------- 145
Memory expansion mode register --------------------- 115
Memory map ------------------------------------------------ 106
MM ------------------------------------------------------------ 115
Multiple interrupt ------------------------------------------- 174
[N]
NCC ----------------------------------------------------------- 167
NMI -------------------------------------------------------------- 81
NMI status saving register -------------------------------- 99
Noise elimination control register --------------------- 167
Non-maskable interrupt ---------------------------------- 149
Normal operation mode ---------------------------------- 102
[O]
Off-board programming ---------------------------------- 525
On-board programming ---------------------------------- 525
On-chip peripheral I/O area ----------------------------- 112
Operation mode -------------------------------------------- 102
Содержание V850/SB1
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