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CHAPTER 4 BUS CONTROL FUNCTION
User’s Manual U13850EJ6V0UD
130
4.3.2 Bus width
The CPU carries out peripheral I/O access and external memory access in 8-bit, 16-bit, or 32-bit units. The
following shows the operation for each access.
(1) Byte access (8 bits)
Byte access is divided into two types, access to even addresses and access to odd addresses.
Figure 4-1. Byte Access (8 Bits)
0
7
0
7
8
15
Byte data
External data bus
(a) Access to even address
0
7
0
7
8
15
Byte data
External data bus
(b) Access to odd address
(2) Halfword access (16 bits)
In halfword access to external memory, data is dealt with as is because the data bus is fixed to 16 bits.
Figure 4-2. Halfword Access (16 Bits)
0
0
15
15
Halfword data
External data bus
(3) Word access (32 bits)
In word access to external memory, the lower halfword is accessed first and then the higher halfword is
accessed.
Figure 4-3. Word Access (32 Bits)
0
15
0
15
16
31
Word data
External data bus
First
0
15
0
15
16
31
Word data
External data bus
Second
Содержание V850/SB1
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