MIPS MIPS32 74K Series, Руководство по программированию

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Programming the 74K™ core in user mode
57 Programming the MIPS32® 74K™ Core Family, Revision 02.14
4.4 The multiplier
As is traditional with MIPS CPUs, the integer multiplier is a semi-detached unit with its own pipeline. All MIPS32
CPUs implement:
•
mult
/
multu
: a 32
×
32 multiply of two GPRs (signed and unsigned versions) with a 64-bit result delivered in the
multiply unit’s pseudo-registers hi and lo (readable only using the special instructions
mfhi
and
mflo
, which are
interlocked and stall until the result is available).
•
madd
,
maddu
,
msub
,
msubu
: multiply/accumulate instructions collecting their result in hi / lo .
•
mul
/
mulu
: simple 3-operand multiply as a single instruction.
Table 4.1 Hints for “pref” instructions
Hint What happens in the 74K core Why would you use it?
No Name
0 load Read the cache line into the D-cache if
not present. When you expect to read the data soon.
Use “store” hint if you also expect to
modify it.
1 store
4 load_streamed Fetch data, but always use cache way
zero - so a large sequence of “streamed”
prefetches will only ever use a quarter of
the cache. For data you expect to process sequen-
tially, and can afford to discard from the
cache once processed
5 store_streamed
6 load_retained Fetch data, but never use cache way
zero. That means if you do a mixture of
“streamed” and “retained” operations,
they will not displace each other from
the cache. For data you expect to use more than
once, and which may be subject to com-
petition from “streamed” data.
7 store_retained
25 writeback_invalidate/
nudge
If the line is in the cache, invalidate it
(writing it back first if it was dirty).
Otherwise do nothing.
However (with the 74K core only): if
this line is in a region marked for
“uncached accelerated write” behavior,
then write-back this line. When you know you’ve finished with
the data, and want to make sure it loses
in any future competition for cache
resources.
30 PrepareForStore If the line is not in the cache, create a
cache line - but instead of reading it
from memory, fill it with zeroes and
mark it as “dirty”.
If the line is already in the cache do
nothing - this operation cannot be relied
upon to zero the line. When you know you will overwrite the
whole line, so reading the old data from
memory is unnecessary.
A recycled line is zero-filled only
because its former contents could have
belonged to a sensitive application -
allowing them to be visible to the new
owner would be a security breach.
31 PrepareForStoreNZ As type 30 above, except that the line is
not filled with zeroes. Yields the highest possible performance
when you’re going to overwrite the
whole line. However, this is at the cost
of a security leak: a user-mode applica-
tion which uses this prefetch can (some-
what randomly) obtain a view of kernel
or other-process memory data it should
not be able to see. An OS can make this
instruction safe (same as
pref 30
above) by keeping
Config7[FPFS]
zero
— see Figure B.3 and notes.