The MIPS32® DSP ASE
95
Programming the MIPS32® 74K™ Core Family, Revision 02.14
•
Q15 dot product from paired-half, and accumulate:
dpaq_s.w.ph
does a SIMD multiply of the Q15 halves of
the operands, then adds the results and saturates to form a Q31 fraction, which is accumulated into a Q32.31 frac-
tion in the accumulator.
dpsq_s.w.ph
does the same but subtracts the dot product from the accumulator.
For the imaginary component of a complex multiply, first swap the Q15 numbers in one of the register operands
with a
rot
(bit-rotate) instruction.
For the real component of a complex Q15 multiply, you have the difference-of-products instruction
mulsaq_s.w.ph
, which parallel-multiplies both Q15 halves of the PH operands, then computes the difference
of the two results and leaves it in an accumulator in Q32.31 format (beware: this does not accumulate the result).
•
16-bit integer dot-product from paired-half, and accumulate:
dpau.h.qbl
/
dpau.h.qbr
picks two QB val-
ues from each source register, parallel-multiplies the corresponding pairs to integer 16-bit values, adds them
together and then adds the whole lot into an accumulator.
dpsu.h.qbl
/
dpsu.h.qbr
do the same sum-of-
products, but the result is then subtracted from the accumulator. In both cases, note this is integer (not fractional)
arithmetic.
•
Q31 saturated multiply-accumulate: is the nearest thing you can get to a dot-product for Q31 values.
dpaq_sa.l.w
does a Q31 multiplication and saturates to produce a Q63 result, which is added to the accumu-
lator and saturated again.
dpsq_sa.l.w
does the same, except that the multiply result is subtracted from the
accumulator (again, useful for the real component of a complex number).
7.4.13 Other DSP ASE instructions
•
Branch on DSPControl field:
bposge32
branches if
DSPControl[pos]
≥
32
.
Typically the test is for “is it time to load another 32 bits of data from the bitstream yet?”.
•
Circular buffer index update:
modsub
takes an operand which packs both a maximum index value and an index
step, and uses it to decrement a “buffer index” by the step value, but arranging to step from zero to the provided
maximum.
•
Bitfield insert with variable size/position:
insv
is a bit-insert instruction. It acts like the MIPS32 standard
instruction
ins
except that the position and size of the inserted field are specified not as immediates inside the
instruction, but are obtained from
DSPControl[pos]
(which should be set to the lowest numbered bit of the field
you want) and
DSPControl[scount]
respectively.
•
Bit-order reversal:
bitrev
reverses the bits in the low 16 bits of the register. The high half of the destination is
zero.
The bit-reverse operation is a computationally crucial step in buffer management for FFT algorithms, and a 16-
bit operation supports up to a 32K-point FFT, which is much more than enough. A full 32-bit reversal would be
expensive and slow.
7.5 Macros and typedefs for DSP instructions
It’s useful to be able to use fragments of C code to describe what some instructions do. To do that, we need to be able
to refer to fractional types, saturation and vectors. Here are the definitions we’re using
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Содержание MIPS32 74K Series
Страница 1: ...Document Number MD00541 Revision 02 14 March 30 2011 Programming the MIPS32 74K Core Family...
Страница 10: ...Programming the MIPS32 74K Core Family Revision 02 14 10...
Страница 20: ...1 4 A brief guide to the 74K core implementation Programming the MIPS32 74K Core Family Revision 02 14 20...
Страница 28: ...2 2 PRId register identifying your CPU type Programming the MIPS32 74K Core Family Revision 02 14 28...
Страница 54: ...3 8 The TLB and translation Programming the MIPS32 74K Core Family Revision 02 14 54...
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Страница 86: ...6 5 FPU pipeline and instruction timing Programming the MIPS32 74K Core Family Revision 02 14 86...
Страница 101: ...The MIPS32 DSP ASE 101 Programming the MIPS32 74K Core Family Revision 02 14...
Страница 134: ...8 4 Performance counters Programming the MIPS32 74K Core Family Revision 02 14 134...
Страница 154: ...C 3 FPU changes in Release 2 of the MIPS32 Architecture Programming the MIPS32 74K Core Family Revision 02 14 154...