IOtech MultiScan 1200, Руководство пользователя

Страница: 230 / 364

220 Chapter 13: System Operation TempScan / MultiScan User's Manual
Mask Registers
Event Status Enable Register (ESE)
The Event Status Enable Register (
ESE
) is a Read/Write/Clear register in that they can be written and
cleared, as well as read by the controller, via the following Set Event Mask (
N
) commands –
N?
,
Nmask
, and
N0
, respectively.
The Event Status Enable Register (
ESE
) may be used to define which bits in the Event Status Register
(
ESR
) will be mapped into the
ESR
Bit 5 (or
ESB
) in the Status Byte Register (
STB
). The bits in the
ESE
represent an exact image of the bits in the
ESR
. When a condition is set in the
ESR
, its image bit is
checked in the
ESE
. If any image bits are enabled, the bits in the
ESR
will be mapped into the
ESR
Bit
5 (or
ESB
) in the
STB
.
The Event Status Enable Register (
ESE
) controls which events, if any, are to be reflected in the Status
Byte Register (
STB
). The bits of the Event Status Register (
ESR
) are logically AND ed with the
corresponding bits of the
ESE
, and the resulting bits are logically OR ed together in the Status Byte
Register (
STB
). The
ESE
does not affect the
ESR
; it only affects the
ESR
Bit 5 (or
ESB
) of the
STB
.
The
ESR
Bit 5 (or
ESB
) in the
STB
is set when its corresponding Bit 5 in the Service Request Enable
Register (
SRE
) is enabled. The
ESE
is set and interrogated with the Set Event Mask (
N
) command. For
more information, see command Set Event Mask (
N
) in the chapter API Command Reference .
Service Request Enable Register (SRE)
The Service Request Enable Register (
SRE
) is a Read/Write/Clear register in that it can be written and
cleared, as well as read by the controller, via the Set SRQ Mask (M) commands –
M?
,
Mmask
, and
M0
,
respectively.
The Service Request Enable Register (
SRE
) may be used to define those conditions in the Status Byte
Register (
STB
) which will generate a Service Request (
SRQ
). The bits in the
SRE
represent an exact
image of the bits in the
STB
except for the Request for Service Bit (
RQS
, Bit 6) or Master Summary
Status Bit (
MSS
, Bit 6). When a condition is set in the
STB
, its image bit is checked in the
SRE
. If the
image bit is enabled, the TempScan/1100 or MultiScan/1200 will generate a Service Request (
SRQ
).
The Service Request Enable Register (
SRE
) controls which bits of the Status Byte Register (
STB
) are
reflected in the Request for Service Bit (
RQS
, Bit 6) and Master Summary Status Bit (
MSS
, Bit 6) of the
STB
. The bits of the
STB
are logically AND ed with the corresponding bits of the
SRE
. The resulting
bits are logically OR ed together to form the Master Summary Status Bit (
MSS
, Bit 6) in the
STB
and to
control the Request for Service Bit (
RQS
, Bit 6) in the
STB
. The
SRE
does not affect the
STB
; it only
affects the
MSS
and
RQS
Bits of the
STB
. The
ESE
is set and interrogated with the Set SRQ Mask (
M
)
command. For more information, see command Set SRQ Mask (
M
) in the chapter API Command
Reference .
Using Status-Reporting Registers
As previously mentioned, the status-reporting registers are organized in a hierarchical structure. The
lower-level registers contain more-general event information, and the higher-level registers contain
more-detailed information about particular events. Typically, the lowest-level status-reporting register,
the Status Byte Register (
STB
) contains time-critical information that may require more immediate
action from the controller. In addition, other registers may access the
STB
via the
ESR
Bit (or
ESB
).
This allows any condition within the status-reporting register hierarchy to have access to the
STB
, Serial
Poll (
SPOLL
), and Service Request (
SRQ
).