Teledyne ULTRAFLOW 150, Operation Manual, Page: 30 / 162

ULTRAFLOW 150 GAS FLOW AND TEMPERATURE MONITOR
5.2.3.4 Diagnostic Waveforms Circuit
The Flow Mother Board has an important built in diagnostic feature. Eight
different signals can be viewed from test point 21 (TP21) depending on the
configuration of the diagnostic jumpers of JU8. The FPGA places the digital data
selected by JU8 (positions A, B or C) on a twelve-bit buss that connects to a
digital to analog converter (DAC). The DAC sends an analog representation of
the data through a buffer to TP21. This gives the user a way to view complex
data such as the filtered and integrated receive data that exists only in the digital
realm.
DIAG_2
(JU8C)
DIAG_1
(JU8B)
DIAG_0
(JU8A)
Diagnostic Output
0 0 0 A/D Output
0 0 1 Filter ABS
0 1 0 Boxcar (6--17)
0 1 1 Boxcar (7--18)
1 0 0 Boxcar (9--20)
1 0 1 Boxcar (10--21)
1 1 0 Boxcar (11--22)
1 1 1 Boxcar (12--23)
Figure 5-4B Figure 5-4C
Note: The sample diagnostic waveforms above were taken from TP21 during normal
mode with the scope triggered on TP34.
5.2.3.5 Bus Transceivers and Logic Level Differences
The digital components of the Flow Mother Board operate with three different
logic levels. The FPGA’s internal logic uses 2.5 VDC. Its I/O logic requires 3.3
VDC. The SBC 332 Processor and Neuron Circuit use conventional 5.0 VDC
Figure 5-4A
Typical filtered, absolute value waveform
Typical A/D output waveform, Normal
5-6