Tektronix 2445, Instruction Manual

Page: 150 / 351

Table 6-5
Kernel Test Failure Codes
Failure Codes
Option Device Failing Device
0 0 Control Board RAM
0
1 ROM at E000 (hex)
0
2 ROM at C000 (hex)
0
3
ROM at A000 (hex)
0
4 ROM at 9000 (hex)
Table 6-6
Front-Panel LED Option Codes
Option Code
CH 1
LED
(bit 3)
CH 2
LED
(bit 2)
CH 3
LED
(bit 1)
CH 4
LED
(bit 0)
Option
Number
(in hex)
Option
Name
OFF
OFF
OFF OFF
0
Basic Instrument
ON ON ON ON F Options Buffer
Board
Table 6-7
Front-Panel LED Device Codes
Device Code
READY
LED
(bit 2)
+
LED
(bit 1)
LED
(bit 0)
Device
Number
OFF OFF OFF 0
OFF
OFF ON 1
OFF
ON OFF 2
OFF
ON ON 3
ON
OFF OFF 4
ON
OFF ON 5
ON
ON OFF 6
ON
ON ON 7
Even if a Kernel test fails, the operator may try to go to
normal oscilloscope operation by pressing the A/B TRIG se­
lect push button. Depending on the exact nature of the fail­
ure, the instrument may or may not be functional.
Maintenance— 2445 Service
Kernel tests are automatically executed at power up. The
Kernel tests are divided into RAM tests and ROM tests as
follows:
RAM TEST.
This test is a complete march test. The RAM
is first filled with zeros. The first location is then read, check­
ing that only zeros are present. (In later cycles this ensures
that a previous write hasn’t written to the location.) A “1” is
walked through each bit of the addressed location and read
back after each write to ensure only one bit at a time
changes. Each of the succeeding address locations is read,
then written to in the same way until the RAM is filled with
ones. After the RAM is filled, a “0” is walked through each
bit location in a similar manner.
Test checks:
RAM address decoding, RAM address
lines, RAM data lines, and Data Bus Buffers.
ROM TEST.
The ROM test performs three checks on
each of the system read-only memories.
Data Bus Drive
—Two locations containing complemen­
tary data patterns are read.
Test checks: Data bus lines and the Data Bus Driver.
Correct Part
— A byte in the ROM being checked is com­
pared to the most-significant byte of the addressed ROM
block (starting address of where the ROM should be
installed).
Test checks: ROM address decoding and proper instal­
lation of ROM components.
Checksum — A sixteen bit, spiral-add checksum is calcu­
lated and compared to a two-byte value stored in ROM be­
ing checked.
Test checks: ROM contents, ROM addressing, ROM
data lines, and the Data Bus Driver.
Confidence Tests
The Confidence tests provide checks for much of the re­
maining circuitry to ensure that instrument operation is cor­
rect. Confidence tests are performed automatically at power
up after the Kernel is determined to be functional or initiated
by the operator from the Diagnostic Monitor.
A failure of any Confidence test during power up will pass
control to the Diagnostic Monitor; this permits the test re­
sults to be examined. Descriptions of the Confidence tests
follow.
6-13