Tektronix 2445, Instruction Manual

Page: 47 / 351

Theory of Operation—2445 Service
the sweep. For B Sweeps, and in the case of intensified
sweeps, the A Sweep Delay Gate signal (DG) enables the B
Sweep circuit. Depending on the B Trigger mode selected, a
B Sweep w ill be initiated either immediately (RUN AFT
DLY) or on the next B Trigger signal (TRIG AFT DLY).
The slope of the sweep ramp is dependent on Micro-
processor-generated control data loaded into the internal
control register of the A and B Sweep circuit hybrids.
Sweep signals generated by each o f the Sweep hybrids
are applied to the Horizontal Am plifier. The Horizontal
Am plifier is directed by the Display Sequencer to select
one of the sweep ramps for amplification in sequence.
In the case of Readout and X-Y displays, the X-Readout
and CH 1 input signals are selected to be amplified, also
under direction of the Display Sequencer.
To control the display intensity, the Display Sequencer
directs the Z-Axis circuit to unblank the display at the
appropriate time for the sweeps and readout displays. When
the display is unblanked, the Display Sequencer selects the
display intensity for either waveform displays or fo r read­
out displays by switching control o f the Z-Axis beam
current between the front-panel INTENSITY and READ­
OUT INTENSITY potentiometers as appropriate.
During readout displays, the vertical dot-position signal
from the Readout circuitry is applied to the Vertical
A m plifier via the Vertical Channel Switch. Horizontal
dot-position deflection fo r the readout display is selected
by internal switching in the Horizontal Am plifier.
The vertical, horizontal, and Z-Axis signals are applied
to their respective amplifiers where they are raised to crt-
drive levels. The output signals from the Vertical and
Horizontal Amplifiers are applied directly to the crt deflec­
tion plates. The Z-Axis A m plifier output signal requires
interfacing to the high-potential crt environment before
application to the crt control grid. The necessary Z-Axis
interfacing is provided by the DC Restorer circuit located
on the High-Voltage circuit board. The resulting display
may be o f waveforms, alphanumeric readout, or a combina­
tion o f both.
DETAILED CIRCUIT DESCRIPTION
INTRODUCTION
The following discussion provides detailed information
concerning the electrical operation and circuit relation­
ships of the 2445 Oscilloscope. Circuitry unique to the
2445 is described in detail, while circuits common in the
electronics industry are not. The descriptions are accom­
panied by supporting illustrations and tables. Diagrams
identified in the text, on which associated circuitry is
shown, are located at the rear of this manual in the tabbed
foldout pages.
PROCESSOR AND
DIGITAL CONTROL
The Processor and Digital Control circuitry (diagram 1)
directs the operation of most oscilloscope functions by
following fimware control instructions stored in memory.
These instructions direct the Microprocessor to m onitor
the front-panel controls and to send control signals that
set up the various signal processing circuits accordingly.
Microprocessor
The Microprocessor (U2092) is the center of control
activities. It has an eight-bit, bidirectional data bus fo r data
transfer (DO through D7) and a 16-bit address bus (AO
through A15) fo r selecting the source or destination o f the
data. Precise timing of instruction execution, addressing, and
data transfer is provided by an external, crystal-controlled
clock signal.
The clock signal is developed by the Microprocessor
Clock stage and applied to the Microprocessor at pin 39.
Using the external clock as a reference, the Microprocessor
generates synchronized control output signals [R/W (read-
write), E (enable), and VM A (valid memory address)]
that maintain proper timing relationships throughout the
instrument.
Microprocessor Clock
The Microprocessor Clock stage generates a 5-MHz
square-wave clock signal to the Microprocessor and a
10-MHz clock signal to portions of the Readout circuitry.
Inverter U2556A acts as an oscillator w ith crystal Y2568
providing feedback at the resonant frequency. The required
phase shift for oscillation to occur is produced by C2565,
C2566, R2564, and the crystal. The RC network composed
of R2571, C2572, R2553, and R2573 biases input pin 10
of U2556A in the active region and establishes approximate
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