SN32F760 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 73
Version 2.0
5
5
5
GENERAL PURPOSE I/O PORT (GPIO)
5.1 OVERVIEW
Digital ports can be configured input/output by SW
Each individual port pin can serve as external interrupt input pin.
Interrupts can be configured on single falling or rising edges and on both edges.
The I/O configuration registers control the electrical characteristics of the pads.
Internal pull-up/pull-down resistor.
Most of the I/O pins are mixed with analog pins and special function pins.
5.2 GPIO MODE
All GPIO pins are inputs and floating by default. The MODE bits in the
(n=0,1,2,3) register allow the
selection of on-chip pull-up or pull-down resistors for each pin or select the repeater mode.
The repeater mode enables the pull-up resistor if the pin is logic HIGH and enables the pull-down resistor if the pin is
logic LOW. This causes the pin to retain its last known state if it is configured as an input and is not driven externally.
The state retention is not applicable to the Deep power-down mode.
