SONIX SN32F755, User Manual

Page: 195 / 225

SN32F760 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 195
Version 2.0
3:2 LCDTYPE[1:0]
LCD type control bit
00: R-Type
01: 4C Type. HW will assign CL+, CL- pins as LCD pins instead of GPIO.
10: 1C Type. HW will assign CL+, CL- pins as LCD pins instead of GPIO.
11: Reserved
R/W 00b
1 ITB
Used for internal testing and the only value
“1” is allowed.
R/W 1
0 LCDENB
LCD driver enable bit.
0: Disable
1: Enable. HW will assign SEG0~11, V3, V2 pin as LCD pins instead of
GPIO.
R/W 0
16.9.2 LCD Control register 1(LCD_CTRL1)
Address Offset: 0x04
Reset value: 0x1000 0000
Bit Name Description Attribute Reset
31:29 Reserved R/W 0
28 ITB Used for internal testing and the only value
“0” is allowed.
R/W 1
27:3 Reserved R/W 0
2:1 REF[1:0]
Resistance selection for LCD Bias Voltage-division.
00: 400K
01: 200K
10: 100K
11: 35K
R/W 00b
0 LCDBNK
LCD blank control bit
0: Normal display
1: All LCD dots off.
R/W 0
16.9.3 LCD C-Type Control register 1 (LCD_CCTRL1)
Address Offset: 0x08
Reset value: 0x6002 0003
LCD_CCTRL1 is available for C-Type LCD, and the charge pump clock source is controlled by LCDCLK bit in
LCD_CTRL register.
LCDCLK Charge-pump Clock Source
0
ILRC 32KHz
1 ELS XTAL 32.768KHz
Bit Name Description Attribute Reset
31:30
Reserved
The only value
“01b” is allowed.
R/W 01b
29:28 IT1[1:0] Used for internal testing and the only value
“00b” is allowed.
R/W 10b
27:24 IT2[3:0] Used for internal testing and the only value
“0100b” is allowed.
R/W 00b