Renesas NU85E, Preliminary User'S Manual

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CHAPTER 3 CPU
Preliminary User’s Manual A14874EJ3V0UM
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3.5.3 Instruction cache control registers
Bit Units for Manipulation Address Register Name Symbol R/W
1 Bit 8 Bits 16 Bits
After Reset
FFFFF070H Instruction cache control register ICC R/W
√
0003H
Note 1
FFFFF070H Instruction cache control register L ICCL R/W
√ √
03H
Note 2
FFFFF071H Instruction cache control register H ICCH R/W
√ √
00H
FFFFF074H Instruction cache data configuration register ICD R/W
√
Undefined
Notes 1. This value becomes 0003H when the reset signal is active, and tag initialization starts automatically.
The value changes to 0000H upon the completion of tag initialization.
2. This value becomes 03H when the reset signal is active, and tag initialization starts automatically. The
value changes to 00H upon the completion of tag initialization.
3.5.4 Data cache control registers
Bit Units for Manipulation Address Register Name Symbol R/W
1 Bit 8 Bits 16 Bits
After Reset
FFFFF078H Data cache control register DCC R/W
√
0003H
Note
FFFFF07CH Data cache data configuration register DCD R/W
√
Undefined
Note This value becomes 0003H when the reset signal is active, and tag initialization starts automatically. The
value changes to 0000H upon the completion of tag initialization.