CHAPTER 1 INTRODUCTION
Preliminary User’s Manual A14874EJ3V0UM
19
1.3 Features
•
Number of instructions 83
•
General-purpose registers
32 bits
×
32 registers
•
Instruction set
Upwardly compatible with V850 CPU
Signed multiplication (32 bits
×
32 bits
→
64 bits)
Saturated calculation instructions (with overflow/underflow detection function)
32-bit shift instructions: 1 clock
Bit manipulation instructions
Load/store instructions with long/short format
Signed load instructions
•
Memory space
Program area: 64 MB linear address space
Data area: 4 GB linear address space
Memory bank division function: 2, 4, or 8 MB/bank
•
External bus interface
VSB (V850E system bus)
- Address/data separated bus (28-bit address
Note
/32-bit data bus)
- Data I/O separated bus
- 32-/16-/8-bit bus sizing function
- Bus hold function
- External wait function
- Endian switching function
NPB (NEC peripheral I/O bus)
- Address/data separated bus (14-bit address/16-bit data bus)
- Data I/O separated bus
- Programmable wait function
- Retry function
Note
14-bit address bus when functioning as bus slave
•
Interrupt/exception control functions
Non-maskable interrupts: 3 sources
Maskable interrupts: 64 sources
Exceptions: 1 source
Eight levels of priorities can be set (maskable interrupts)
•
DMA control function
4-channel configuration
Transfer units: 8-bit, 16-bit, or 32-bit
Maximum transfer count: 65,536 (2
16
)
Transfer types: Flyby (1-cycle) transfer or 2-cycle transfer
Transfer modes: Single transfer, single-step transfer, line transfer, or block transfer
Terminal count output signals (DMTCO3 to DMTCO0)
