UM10208_2
© NXP B.V. 2007. All rights reserved.
User manual
Rev. 02 — 1 June 2007
277 of 362
NXP Semiconductors
UM10208
Chapter 22: LPC2800 DDAC
4.1 Stream I/O Configuration Register (SIOCR - 0x8020 0384)
This register also contains bits that affect the I
2
S In, I
2
S Out, and Dual ADC blocks. All but
one of its bits have fixed and prescribed states. Typically, this register is written once,
during system initialization (reset) code.
4.2 Dual DAC Control Register (DDACCTRL - 0x8020 0398)
Table 314. Stream I/O Configuration Register (SIOCR - 0x8020 0384)
Bit(s) Name
Description
Reset
value
6:0
-
Reserved. Always write 1s to these bits
0
7
DAI_OE
This bit affects the I
2
S input module (DAI). See
.
1
31:8
-
Reserved. Always write 0s to these bits. The value read from
reserved bits is not defined.
-
Table 315. Dual DAC Control Register (DDACCTRL - 0x8020 0398)
Bit(s) Name
Description
Reset
Value
7:0
RGAIN
This field controls the negative gain (volume level) of the right
channel. Values 0-200 select 0 thru -50 dB in steps of 0.25 dB. Values
above 200 select negative gain as follows.
1100 1000 -50.0 dB
1100 1100 -53.0 dB
1101 0000 -56.0 dB
1101 0100 -58.9 dB
1101 1000 -62.0 dB
1101 1100 -65.2 dB
1110 0000 -68.0 dB
1110 0100 -71.2 dB
1110 1000 -73.4 dB
1100 1100 -76.3 dB
1111 0000 -80.8 dB
1111 0100 -84.3 dB
1111 1000 -90.3 dB
1111 11xx Mute
0
15:8
LGAIN
This field controls the negative gain (volume level) of the left channel,
as described for RGAIN.
0
18:16 DEEMPH
When the MODE field is 00, this field controls digital de-emphasis. In
order to apply de-emphasis in the digital domain, the circuit needs to
know the Nyquist frequency. The -3 dB corner frequency of this
function is about 3.5 kHz at all four frequencies.
001 selects de-emphasis for fs = 32 kHz
010 selects de-emphasis for fs = 44.1 kHz
011 selects de-emphasis for fs = 48 kHz
100 selects de-emphasis for fs = 96 kHz
MODE=01, and other values in this field, disable digital de-emphasis
0
