NXP Semiconductors LPC2880, User Manual

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UM10208_2 © NXP B.V. 2007. All rights reserved.
User manual Rev. 02 — 1 June 2007 276 of 362
NXP Semiconductors
UM10208
Chapter 22: LPC2800 DDAC
3. The third stage is a simple hardware linear interpolator (LIN) function that increases
the sample rate from 8 fs to 128 fs and removes the 8 fs, 16 fs, 32 fs and 64 fs
components in the output spectrum.
4. The 3rd-order noise shaper operates at either 128 fs or 256 fs depending on the mode
of operation chosen. It shifts in-band quantization noise to frequencies well above the
audio band. This noise shaping technique enables high Signal-to-Noise ratios to be
achieved at low frequencies. The noise shaper output is converted into an analog
signal using a 4-bit Switched Resistor Digital-to-Analog Converter.
For input sample rates between 8 kHz and 32 kHz the noise shaper and DAC must run at
256 fs instead of 128 fs to avoid a significant noise increase in the frequency band 0 to 20
kHz.
3. Dual DAC pins
The dual DAC has two dedicated output pins and two voltage reference pins, as shown in
Table 22–312 .
The voltages on AOUTL and AOUTR will always lie between those on VREFN and
VREFP. The recommended interface to the output pins, for output frequencies in the
audio range, includes a series capacitor of about 22 uF, a 3.3 nF post-filter capacitor to
ground on the pin side of the series cap, and a 10K pulldown resistor to ground on the
destination side of the series cap.
4. Registers
Table 22–313 shows the registers that relate to the Dual DAC. Subsequent tables
describe their content in greater detail.
Table 312. DDAC output pins
Name Description
AOUTL Left analog output
AOUTR Right analog output
VREFP(DAC) Positive reference voltage
VREFN(DAC) Negative reference voltage
Table 313. Dual DAC registers
Name Address Description Access Reset
value
SIOCR 0x8020 0384 Stream I/O Configuration Register. This register
is shared with the I
2
S in, I
2
S out, and Dual ADC
blocks. The bit in this register that affects the Dual
ADC has a fixed/prescribed value.
R/W 0x180
DDACCTRL 0x8020 0398 Dual DAC Control Register. Contains control bits
for the Dual Digital-to-Analog Converters.
R/W 0
DDACSTAT 0x8020 039C Dual DAC Status Register. Contains status bits
for the Dual Digital-to-Analog Converters.
RO 0
DDACSET 0x8020 03A0 Dual DAC Settings Register. Contains additional
control bits for the Dual Digital-to-Analog
Converters.
R/W 0