NXP Semiconductors LPC2880, User Manual

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User manual Rev. 02 — 1 June 2007 75 of 362
NXP Semiconductors
UM10208
Chapter 7: LPC2800 CGU
5. CGU usage notes
5.1 Example 1: Programming the MCI and the LCD interface using the
CGU
In this example, the main PLL uses the fast (12 MHz) oscillator as input and multiplies it
up to 60 MHz. This example uses the “SYS” selection stage and registers SYSFDCR1
and SYSFDCR3 as Fractional Divider registers (compare to
Table 7–71 ):
The selection stage (SYS) selects the Main PLL and generates the output clock (SYS
base clock, i.e. 60 MHz) which is fed to all the SYS spreading stages.
Except the MCI_MCLK (MCI clock for MCI/SD interface) and the LCD_CLK (LCD bus
clock for LCD interface), the rest of the spreading stage output clocks (see
Table 7–71 )
are selected to be the same as the input clock ( SYS base clock) from the selection stage
( SYS ), i.e. 60 MHz. The MCI_MCLK (MCI clock for MCI/SD interface) is programmed as
Table 72. Structure of the CGU
Main
clocks Selection
stages Fractional
divider
registers Spreading
stage
registers Clock name Clock description
32 kHz Osc
12 MHz
Osc
MCLK pin
BCKI pin
WSI pin
Main PLL
HS PLL
SYS SYSFDCR0
SYSFDCR1
SYSFDCR2
SYSFDCR3
SYSFDCR4
SYSFDCR5
APB0xxx0 APB0_CLK
APB1xxx0 APB1_CLK
APB2xxx0 APB2_CLK
APB3xxx0 APB3_CLK
MMIOxxx0 MMIO_HCLK AHB clock for interrupt controller
AHB0xxx AHB0_CLK
MCIxxx0 MCI_PCLK PCLK for MCI/FD interface
MCIxxx1 MCI_MCLK MCI clock for MCI/FD interface
UARTxxx0 UART_PCLK APB clock for UART
FLSHxxx0 FLASH_CLK main clock for Flash
FLSHxxx1 FLASH_TCLK test clock for Flash
FLSHxxx2 FLASH_PCLK PCLK for Flash
LCDxxx0 LCD_PCLK PCLK for LCD interface
LCDxxx1 LCD_CLK LCD bus clock for LCD interface
DMAxxx0 DMA_PCLK PCLK for DMA channels
DMAxxx1 DMA_GCLK gated register clock for DMA channels
USBxxx0 USB_HCLK AHB clock for USB interface
CPUxxx0 CPU_CLK main processor clock
CPUxxx1 CPU_PCLK PCLK for processor
CPUxxx2 CPU_GCLK gated HCLK for processor registers
RAMxxx RAM_CLK clock for internal RAM
ROMxxx ROM_CLK clock for internal ROM
EMCxxx0 EMC_CLK External Memory Controller
EMCxxx1 EMC_CLK2 External Memory Controller
MMIOxxx1 MMIO_CLK main clock for interrupt controller