UM10208_2
© NXP B.V. 2007. All rights reserved.
User manual
Rev. 02 — 1 June 2007
183 of 362
NXP Semiconductors
UM10208
Chapter 15: LPC2800 GPDMA
4.2.4 Channel Configuration Registers (DMA[0..7]Config - 0x8010 380C..38EC)
Table 200. Channel Configuration Registers (DMA[0..7]Config - 0x8010 380C..38EC)
Bit
Symbol
Description
Reset
Value
4:0
DestID
Write 0 to this field if the destination is a memory buffer. In this
case the DMA channel increments the address used for each write
operation, by 1, 2, or 4 depending on the Size field in this register.
Write a non-zero value from
to this field, if the
destination is a peripheral. In this case the DMA channel uses the
same address for each write operation, and uses the request
signal from the peripheral to control the transfer.
0
9:5
SourceID
Write 0 to this field if the source is a memory buffer. In this case
the DMA channel increments the address used for each read
operation, by 1, 2, or 4 depending on the Size field in this register.
Write a non-zero value from
to this field, if the
source is a peripheral. In this case the DMA channel uses the
same address for each read operation, and uses the request
signal from the peripheral to control the transfer.
0
11:10 Size
00: transfer 32 bits in each read and write cycle
01: transfer 16 bits in each read and write cycle
10: transfer 8 bits in each read and write cycle
11: reserved, do not use
0
12
SwapEndian
If this bit is 1 and the Size field is 0x, the GPDMA channel swaps
data between Big and LIttle Endian formats for each read and
write operation. For Size=32 bits, it exchanges the MS and LS
bytes, as well as the two “middle” bytes of each word. For Size=16
bits, it exchanges the two bytes in each halfword.
A GPDMA channel can be used to change the “endian-ness” of
data “in place” in a memory buffer, by programming the Source
and Destination addresses with the same starting value.
0
15:13 PairedChannel To use two channels to follow a linked list of memory buffers,
program the channel number of the other channel into this field for
each channel, and set the PairedChannelEnab bit for each
channel. (See
0
16
-
Reserved. The value read from a reserved bit is not defined.
-
17
PairedChannel
Enab
To use two channels to follow a linked list of memory buffers, set
this bit in both channels. (See
0
18
CircularBuffer
If this bit is 1, the channel will not clear its Enable bit when it has
incremented the Transfer Count Register to equal the Transfer
Length Register, but will clear the Transfer Count and reload its
working address registers from the Source and Destination
Address Registers.
This mode can be used with both the “half complete” and
“complete” interrupts enabled for the channel, to allow
software/firmware to handle half a buffer of data at a time. Such
operation has many of the operational advantages of “linked list”
operation, but requires only one channel.
0
31:19 -
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
-
