UM10208_2
© NXP B.V. 2007. All rights reserved.
User manual
Rev. 02 — 1 June 2007
304 of 362
1.
Features
•
4- or 8-bit external data bus, or serial data, for connection to LCD or other devices.
•
8080- or 6800-compatible parallel mode.
•
Software-configurable control signals for glue-logic-free connection.
•
16-byte output FIFO
•
Optional hardware polling of busy/ready status
•
Flow control for use with GPDMA channel
2.
Description
The LCD interface is a bus interface intended for self-contained LCD displays with their
own driver circuits. Many low-cost LCD displays include an 8-bit bus interface like the Intel
8080 or Motorola 6800 data bus. Essentially, the LCD interface is a generic and
configurable 8-bit data bus. The interface also includes an option for communication with
serial-interface devices.
3.
LCD interface pins
describes the pins associated with the LCD interface. If the LCD interface is
not used, the pins can be programmed to be general purpose I/O.
UM10208
Chapter 24: LCD controller
Rev. 02 — 1 June 2007
User manual
Table 350. LCD Interface Pins
Name
Type
Description
LD7:0
I/O
Bidirectional data bus, or serial clock and data. Since LCD devices are
handled mostly by writing to them, and to avoid the power consumption
associated with floating inputs, these pins reset to output state.
LCS
Output Chip Select. Programmable for high or low-active.
LRW
Output Low-active Write strobe (8080 compatible) or W/R (6800 compatible)
LER
Output Read strobe (8080) or E clock (6800)
LRS
Output High for “data register” accesses, low for “instruction register” accesses.
If hardware busy checking is enabled, this line is used to select between
the remote device’s status register and data register.
