CHAPTER 4 PORT FUNCTIONS
Preliminary User’s Manual U19014EJ1V0UD
73
4.2.5 Port 12
Port 12 is a 3-bit I/O port with an output latch. Port 12 can be set to the input mode or output mode in 1-bit units
using port mode register 12 (PM12). When used as an input port only for P120, use of an on-chip pull-up resistor can
be specified by pull-up resistor option register 12 (PU12).
This port can also be used as pins for external interrupt request input, connecting resonator for main system clock,
and external clock input for main system clock.
Reset signal generation sets port 12 to input mode.
Figures 4-13 and 4-14 show block diagrams of port 12.
Cautions 1. When using the P121 and P122 pins to connect a resonator for the main system clock (X1,
X2) or to input an external clock for the main system clock (EXCLK), the X1 oscillation mode
or external clock input mode must be set by using the clock operation mode select register
(OSCCTL) (for details, see 5.3 (1) Clock operation mode select register (OSCCTL). The reset
value of OSCCTL is 00H (all of the P121 and P122 pins are I/O port pins). At this time, setting
of the PM121, PM122, P121, and P122 pins is not necessary.
2. When writing the flash memory with a flash memory programmer, connect P121/X1/OCD0A
as follows.
•
P121/X1/OCD0A: When using this pin as a port, connect it to V
SS
via a resistor (10 k
Ω
:
recommended) (in the input mode) or leave it open (in the output mode).
The above connection is not necessary when writing the flash memory by means of self
programming.
Remark
The X1 and X2 pins of the
µ
PD78F0730 can be used as on-chip debug mode setting pins (OCD0A,
OCD0B) when the on-chip debug function is used. For details, see
CHAPTER 20 ON-CHIP DEBUG
FUNCTION.
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