NEC mPD78F0730, Preliminary User'S Manual

Page: 202 / 518

CHAPTER 8 8-BIT TIMER H1
Preliminary User’s Manual U19014EJ1V0UD
202
Figure 8-8. Timing of Interval Timer/Square-Wave Output Operation (1/2)
(a) Basic operation (Operation When 01H
≤
CMP01
≤
FEH)
00H
Count clock
Count start
8-bit timer counter H1
CMP01
TMHE1
INTTMH1
TOH1
01H N
Clear
Interval time
Clear
N
00H 01H N 00H 01H 00H
<2>
Level inversion,
match interrupt occurrence,
8-bit timer counter H1 clear
<2>
Level inversion,
match interrupt occurrence,
8-bit timer counter H1 clear
<3> <1>
<1> The count operation is enabled by setting the TMHE1 bit to 1. The count clock starts counting no more than
1 clock after the operation is enabled.
<2> When the value of 8-bit timer counter H1 matches the value of the CMP01 register, the value of the timer
counter is cleared, and the level of the TOH1 output is inverted. In addition, the INTTMH1 signal is output at
the rising edge of the count clock.
<3> If the TMHE1 bit is cleared to 0 while timer H is operating, the INTTMH1 signal and TOH1 output are set to
the default level. If they are already at the default level before the TMHE1 bit is cleared to 0, then that level
is maintained.
Remark 01H
≤
N
≤
FEH
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