NEC mPD78F0730, Preliminary User'S Manual

Page: 417 / 518

CHAPTER 14 STANDBY FUNCTION
Preliminary User’s Manual U19014EJ1V0UD
417
Table 14-3. Operating Statuses in STOP Mode
When STOP Instruction Is Executed While CPU Is Operating on Main System Clock STOP Mode Setting
Item
When CPU Is Operating on
Internal High-Speed
Oscillation Clock (f
RH
)
When CPU Is Operating on
X1 Clock (f
X
)
When CPU Is Operating on
External Main System Clock
(f
EXCLK
)
System clock Clock supply to the CPU is stopped
f
RH
f
X
Stopped Main system clock
f
EXCLK
Input invalid
f
RL
Status before STOP mode was set is retained
PLL Operation stopped
CPU Operation stopped
Flash memory Operation stopped
RAM Status before STOP mode was set is retained
For chip Regulator
For USB
Operable in low operating current mode
Port (latch) Status before STOP mode was set is retained
16-bit timer/event counter 00 Operation stopped
50 Operable only when TI50 is selected as the count clock 8-bit timer/event
counter
51 Operable only when TI51 is selected as the count clock
8-bit timer H1 Operable only when f
RL
, f
RL
/2
7
,or f
RL
/2
9
is selected as the count clock
Watchdog timer Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
UART6 Operable only when TM50 output is selected as the serial clock during 8-bit timer/event counter
50 operation
CSI10 Operable only when external clock is selected as the serial clock
Serial interface
USB Operation stopped
Power-on-clear function
Low-voltage detection function
External interrupt
Operable
Remark f
RH
: Internal high-speed oscillation clock
f
X
: X1 clock
f
EXCLK
: External main system clock
f
RL
: Internal low-speed oscillation clock
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