CHAPTER 9 WATCHDOG TIMER
Preliminary User’s Manual U19014EJ1V0UD
220
9.4 Operation of Watchdog Timer
9.4.1 Controlling operation of watchdog timer
1. When the watchdog timer is used, its operation is specified by the option byte (0080H).
•
Enable counting operation of the watchdog timer by setting bit 4 (WDTON) of the option byte (0080H) to 1
(the counter starts operating after a reset release) (for details, see
CHAPTER 18
).
WDTON
Operation Control of Watchdog Timer Counter/Illegal Access Detection
0
Counter operation disabled (counting stopped after reset), illegal access detection operation disabled
1
Counter operation enabled (counting started after reset), illegal access detection operation enabled
•
Set an overflow time by using bits 3 to 1 (WDCS2 to WDCS0) of the option byte (0080H) (for details, see
9.4.2
and
CHAPTER 18
).
•
Set a window open period by using bits 6 and 5 (WINDOW1 and WINDOW0) of the option byte (0080H) (for
details, see
9.4.3
and
CHAPTER 18
).
2. After a reset release, the watchdog timer starts counting.
3. By writing “ACH” to WDTE after the watchdog timer starts counting and before the overflow time set by the
option byte, the watchdog timer is cleared and starts counting again.
4. After that, write WDTE the second time or later after a reset release during the window open period. If WDTE
is written during a window close period, an internal reset signal is generated.
5. If the overflow time expires without “ACH” written to WDTE, an internal reset signal is generated.
A internal reset signal is generated in the following cases.
•
If a 1-bit manipulation instruction is executed on the watchdog timer enable register (WDTE)
•
If data other than “ACH” is written to WDTE
•
If the instruction is fetched from an area not set by the IMS and IXS registers (detection of an invalid check
during a CPU program loop)
•
If the CPU accesses an area not set by the IMS and IXS registers (excluding FB00H to FFFFH) by executing
a read/write instruction (detection of an abnormal access during a CPU program loop)
Cautions 1. The first writing to WDTE after a reset release clears the watchdog timer, if it is made before
the overflow time regardless of the timing of the writing, and the watchdog timer starts
counting again.
2. If the watchdog timer is cleared by writing “ACH” to WDTE, the actual overflow time may be
different from the overflow time set by the option byte by up to 2/f
RL
seconds.
3. The watchdog timer can be cleared immediately before the count value overflows (FFFFH).
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