Preliminary User’s Manual U19014EJ1V0UD
8
CONTENTS
CHAPTER 1 OUTLINE............................................................................................................................. 14
1.1 Features .................................................................................................................................... 14
1.2 Applications.............................................................................................................................. 14
1.3 Ordering
Information ............................................................................................................... 15
1.4
Pin Configuration (Top View).................................................................................................. 15
1.5 Block
Diagram .......................................................................................................................... 17
1.6
Outline of Functions ................................................................................................................ 18
CHAPTER 2 PIN FUNCTIONS ............................................................................................................... 20
2.1
Pin Function List ...................................................................................................................... 20
2.2
Description of Pin Functions .................................................................................................. 22
2.2.1 P00
and
P01 (port 0) ................................................................................................................. 22
2.2.2 P10
to
P17 (port 1) .................................................................................................................... 23
2.2.3 P30
to
P33 (port 3) .................................................................................................................... 24
2.2.4 P60
and
P61 (port 6) ................................................................................................................. 24
2.2.5 P120
to
P122 (port 12) .............................................................................................................. 25
2.2.6 RESET ...................................................................................................................................... 25
2.2.7 REGC........................................................................................................................................ 26
2.2.8 USBM........................................................................................................................................ 26
2.2.9 USBP ........................................................................................................................................ 26
2.2.10
USBPUC ................................................................................................................................... 26
2.2.11 USBREGC ................................................................................................................................ 26
2.2.12 V
DD
and EV
DD
............................................................................................................................ 26
2.2.13 V
SS
and EV
SS
............................................................................................................................. 26
2.2.14
FLMD0 ...................................................................................................................................... 26
2.3
Pin I/O Circuits and Recommended Connection of Unused Pins....................................... 27
CHAPTER 3 CPU ARCHITECTURE ...................................................................................................... 30
3.1 Memory
Space .......................................................................................................................... 30
3.1.1 Internal
program memory space................................................................................................ 33
3.1.2 Internal
data memory space ...................................................................................................... 35
3.1.3 Special
function
register (SFR) area ......................................................................................... 35
3.1.4 USB area................................................................................................................................... 35
3.1.5 Data
memory addressing .......................................................................................................... 36
3.2 Processor
Registers ................................................................................................................ 37
3.2.1 Control
registers ........................................................................................................................ 37
3.2.2 General-purpose registers......................................................................................................... 41
3.2.3 Special
function registers (SFRs) .............................................................................................. 42
3.3
Instruction Address Addressing ............................................................................................ 47
3.3.1 Relative addressing................................................................................................................... 47
3.3.2 Immediate addressing ............................................................................................................... 48
3.3.3 Table
indirect addressing .......................................................................................................... 49
3.3.4 Register addressing .................................................................................................................. 50
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