CHAPTER 8 8-BIT TIMER H1
Preliminary User’s Manual U19014EJ1V0UD
212
Setting
<1> Set each register.
Figure 8-12. Register Setting in Carrier Generator Mode
(i) Setting 8-bit timer H mode register 1 (TMHMD1)
0
0/1
0/1
0/1
0
Timer output enabled
Default setting of timer output level
Carrier generator mode selection
Count clock (f
CNT
) selection
Count operation stopped
1
0/1
1
TMMD10 TOLEV1
TOEN1
CKS11
CKS12
TMHE1
TMHMD1
CKS10
TMMD11
(ii) CMP01 register setting
•
Compare value
(iii) CMP11 register setting
•
Compare value
(iv) TMCYC1 register setting
•
RMC1 = 1 ... Remote control output enable bit
•
NRZB1 = 0/1 ... carrier output enable bit
(v) TCL51 and TMC51 register setting
•
See
7.3 Registers Controlling 8-Bit Timer/Event Counters 50 and 51
.
<2> When TMHE1 = 1, 8-bit timer H1 starts counting.
<3> When TCE51 of 8-bit timer mode control register 51 (TMC51) is set to 1, 8-bit timer/event counter 51 starts
counting.
<4> After the count operation is enabled, the first compare register to be compared is the CMP01 register.
When the count value of 8-bit timer counter H1 and the CMP01 register value match, the INTTMH1 signal
is generated, 8-bit timer counter H1 is cleared. At the same time, the compare register to be compared with
8-bit timer counter H1 is switched from the CMP01 register to the CMP11 register.
<5> When the count value of 8-bit timer counter H1 and the CMP11 register value match, the INTTMH1 signal
is generated, 8-bit timer counter H1 is cleared. At the same time, the compare register to be compared with
8-bit timer counter H1 is switched from the CMP11 register to the CMP01 register.
<6> By performing procedures <4> and <5> repeatedly, a carrier clock is generated.
<7> The INTTM51 signal is synchronized with count clock of the 8-bit timer H1 and output as the INTTM5H1
signal. The INTTM5H1 signal becomes the data transfer signal for the NRZB1 bit, and the NRZB1 bit value
is transferred to the NRZ1 bit.
<8> Write the next value to the NRZB1 bit in the interrupt servicing program that has been started by the
INTTM5H1 interrupt or after timing has been checked by polling the interrupt request flag. Write data to
count the next time to the CR51 register.
<9> When the NRZ1 bit is high level, a carrier clock is output from the TOH1 pin.
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