CHAPTER 17 LOW-VOLTAGE DETECTOR
Preliminary User’s Manual U19014EJ1V0UD
437
(1) Low-voltage detection register (LVIM)
This register sets low-voltage detection and the operation mode.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets LVIM to 00H.
Figure 17-2. Format of Low-Voltage Detection Register (LVIM)
<0>
LVIF
<1>
LVIMD
2
0
3
0
4
0
5
0
6
0
<7>
LVION
Symbol
LVIM
Address: FFBEH After reset: 00H R/W
Note 1
LVION
Notes 2, 3
Enables low-voltage detection operation
0 Disables
operation
1 Enables
operation
LVIMD
Note 2
Low-voltage detection operation mode selection
0
Generates interrupt signal when supply voltage (V
DD
) < detection voltage (V
LVI
)
1
Generates internal reset signal when supply voltage (V
DD
) < detection voltage (V
LVI
)
LVIF
Note 4
Low-voltage detection flag
0
Supply voltage (V
DD
)
≥
detection voltage (V
LVI
), or when operation is disabled
1
Supply voltage (V
DD
) < detection voltage (V
LVI
)
Notes 1.
Bit 0 is read-only.
2.
LVION and LVIMD are cleared to 0 in the case of a reset other than an LVI reset. These are
not cleared to 0 in the case of an LVI reset.
3.
When LVION is set to 1, operation of the comparator in the LVI circuit is started. Use
software to wait for an operation stabilization time (10
µ
s (MAX.)) when LVION is set to 1 until
the voltage is confirmed at LVIF.
4.
The value of LVIF is output as the interrupt request signal INTLVI when LVION = 1 and
LVIMD = 0.
Caution.
To stop LVI, follow either of the procedures below.
•
When using 8-bit memory manipulation instruction: Write 00H to LVIM.
•
When using 1-bit memory manipulation instruction: Clear LVIMD to 0 and then
clear LVION to 0.
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