CHAPTER 10 SERIAL INTERFACE UART6
Preliminary User’s Manual U19014EJ1V0UD
232
(5) Baud rate generator control register 6 (BRGC6)
This register sets the division value of the 8-bit counter of serial interface UART6.
BRGC6 can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
Remark
BRGC6 can be refreshed (the same value is written) by software during a communication operation
(when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5 (RXE6) of ASIM6
= 1).
Figure 10-6. Format of Baud Rate Generator Control Register 6 (BRGC6)
Address: FF57H After reset: FFH R/W
Symbol 7 6 5 4 3 2 1 0
BRGC6 MDL67 MDL66 MDL65 MDL64 MDL63 MDL62 MDL61 MDL60
MDL67 MDL66 MDL65 MDL64 MDL63 MDL62 MDL61 MDL60 k
Output clock selection of
8-bit counter
0 0 0 0 0 0
×
×
×
Setting prohibited
0 0 0 0 0 1 0 0
4
f
XCLK6
/4
0 0 0 0 0 1 0 1
5
f
XCLK6
/5
0 0 0 0 0 1 1 0
6
f
XCLK6
/6
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
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•
•
•
•
•
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•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
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•
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•
1 1 1 1 1 1 0 0
252
f
XCLK6
/252
1 1 1 1 1 1 0 1
253
f
XCLK6
/253
1 1 1 1 1 1 1 0
254
f
XCLK6
/254
1 1 1 1 1 1 1 1
255
f
XCLK6
/255
Cautions 1. Make sure that bit 6 (TXE6) and bit 5 (RXE6) of the ASIM6 register = 0 when rewriting the
MDL67 to MDL60 bits.
2. The baud rate is the output clock of the 8-bit counter divided by 2.
Remarks 1.
f
XCLK6
: Frequency of base clock selected by the TPS63 to TPS60 bits of CKSR6 register
2.
k: Value set by MDL67 to MDL60 bits (k = 4, 5, 6, ..., 255)
3.
×
: Don’t care
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