CHAPTER 17 LOW-VOLTAGE DETECTOR
Preliminary User’s Manual U19014EJ1V0UD
445
Figure 17-7. Example of Software Processing After Reset Release (1/2)
•
If supply voltage fluctuation is 50 ms or less in vicinity of LVI detection voltage
;
Check the reset source
Note
Initialize the port.
; Setting of detection level by LVIS
The low-voltage detector operates (LVION = 1).
Reset
Initialization
processing <1>
50 ms has passed?
(TMIFH1 = 1?)
Initialization
processing <2>
Setting 8-bit timer H1
(to measure 50 ms)
; Setting of division ratio of system clock,
such as setting of timer
Yes
No
Setting LVI
Clearing WDT
Detection
voltage or higher
(LVIF = 0?)
Yes
LVIF = 0
Restarting timer H1
(TMHE1 = 0
→
TMHE1 = 1)
No
;
The low-voltage detection flag is cleared.
; The timer counter is cleared and the timer is started.
LVI reset
; f
RL
= Internal low-speed oscillation clock (264 kHz (MAX.))
Source: f
RL
(264 kHz (MAX.))/2
7
,
Where comparison value = 104:
≅
50 ms
Timer starts (TMHE1 = 1).
Note
A flowchart is shown on the next page.
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