Chapter 4
Register Descriptions
VME-MXI-2 User Manual
4-40
© National Instruments Corporation
VMEbus Interrupt Acknowledge Register 3 (VIAR3)
VMEbus A16 Offset:
36 (hex)
Attributes:
Read Only
16, 8-bit accessible
15
14
13
12
11
10
9
8
I3[15]
I3[14]
I3[13]
I3[12]
I3[11]
I3[10]
I3[9]
I3[8]
7
6
5
4
3
2
1
0
I3[7]
I3[6]
I3[5]
I3[4]
I3[3]
I3[2]
I3[1]
I3[0]
This register generates a VMEbus Interrupt Acknowledge (IACK) cycle for interrupt
level 3 when read from the MXIbus and returns the Status ID received from the
interrupter. It can generate 16-bit or 8-bit IACK cycles. Generating an 8-bit IACK cycle
requires reading offset 37 (hex). When read from the VMEbus, this register does not
generate an IACK cycle and returns FFFF (hex).
Bit
Mnemonic
Description
15-0
I3[15:0]
Level 3 Interrupter Status ID
These bits return the Status ID received during
the IACK cycle.
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