Chapter 5
System Configuration
© National Instruments Corporation
5-11
VME-MXI-2 User Manual
VMEbus Chassis #3
VMEbus Chassis #4
VMEbus Chassis #5
VMEbus Chassis #1
VMEbus Chassis #6
FF-F0
EF-E0
DF-D0
CF-C0
BF-B0
AF-A0
9F-90
8F-80
7F-70
6F-60
5F-50
3F-30
4F-40
2F-20
1F-10
0F-00
VXIbus Mainframe #2
Device A
Device B
MXIbus #1
F E D C B A 9 8 7 6 5 4 3 2 1 0
Figure 5-6. Logical Address Map Diagram for Example VMEbus/MXIbus System
The multiframe RM by definition is located at logical address 0;
therefore, the host device of the multiframe RM must be assigned a
range of logical addresses that includes logical address 0. Starting
with the MXIbus link on Level 1, which requires the most logical
addresses, assign the lowest available address range of the logical
address map and continue with the next largest MXIbus link.
For the example system, VMEbus Mainframe #1, the host to the
multiframe RM, requires two logical addresses and must have a
range that includes logical address 0. It is assigned address range
0 to 1 hex. The largest first-level MXIbus link is MXIbus #1. It
requires 64 logical addresses. The lowest available address range
of 64 divisible by a power of two is 40 to 7F hex. The other
first-level MXIbus link, MXIbus #2, needs only one logical
address. It is assigned the lowest available logical address, 2 hex.
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