Chapter 4
Register Descriptions
© National Instruments Corporation
4-15
VME-MXI-2 User Manual
Extender A24 Window Register (VWR2)
VMEbus A16 Offset:
E (hex)
Attributes:
Read/Write
16, 8-bit accessible
15
14
13
12
11
10
9
8
0
A24EN
A24DIR
1
1
A24SIZE[2]
A24SIZE[1]
A24SIZE[0]
7
6
5
4
3
2
1
0
A24BASE[7]
A24BASE[6]
A24BASE[5]
A24BASE[4]
A24BASE[3]
A24BASE[2]
A24BASE[1]
A24BASE[0]
You can use this register to control the mapping of VMEbus A24 space between the
VMEbus and the MXIbus. When programming this register, you do not have to consider
any VMEbus A24 space that the VME-MXI-2 itself requires. This is because the
A24/A32 Base Address Decoder has a higher priority than VWR2, and the VME-MXI-2
will respond to its A24 accesses from both the VMEbus and the MXIbus. This register
conforms to the VXIbus Mainframe Extender specification.
This register takes on a different form when the CMODE bit in the VME-MXI-2 Control
Register (VMCR) is set. This different form does not comply with the VXIbus
Mainframe Extender specification, and the CMODE bit should not be set when using a
VXIbus multiframe Resource Manager. For more information on the CMODE bit, refer
to the VMCR register description.
To accommodate 8-bit masters that write to this register, the window is not enabled until
the lower byte of the register is written. Therefore, 8-bit masters should write the upper
byte first, followed by the lower byte.
Bit
Mnemonic
Description
15
0
Reserved
This bit is reserved and returns 0 when read. This
bit can be written with any value.
14
A24EN
Extender A24 Window Enable
Writing a 1 to this bit enables mapping of
VMEbus A24 space through the Extender A24
Window. When this bit is cleared, no VMEbus
A24 accesses are mapped between the VMEbus
and the MXIbus. This bit is cleared by a hard
reset and is not affected by a soft reset.
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