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Index
© National Instruments Corporation
Index-9
VME-MXI-2 User Manual
R
READY bit, 4-7
registers. See VMEbus A24/A32 Registers;
VXIbus Configuration Registers.
REQMEM[3:0] bits, 4-5
request level, VME-MXI-2, 6-9
Requested Memory control,
VME-MXI-2, 6-4
requested memory space, VXI-MXI-2,
B-3 to B-4
requester, VMEbus, B-7
reset, hard and soft
description, 4-1
incompatibilities between VME-MXI
and VME-MXI-2, D-5
RESET bit
soft resets, 4-1
VXIbus Control Register (VCR), 4-9
VXIbus Status Register (VSR), 4-7
RM operation, multiframe.
See multiframe RM.
S
S[15:0] bits
VMEbus Status ID Register
(VSIDR), 4-37
VXIbus Subclass Register
(VSCR), 4-24
SA[31:0] bits, 4-70 to 4-71
SABORT bit, 4-78
SCFG bit, 4-27
SERR[1:0] bits, 4-79
SET DMAIE bit, 4-63
SET DONEIE bit, 4-64
SFIE bit, 4-36
SFIN bit, 4-22
SFINH bit
VXIbus Control Register (VCR), 4-8
VXIbus Status Register (VSR), 4-7
SFINT bit, 4-34
SFOUT bit, 4-22
Shared MXIbus Status/Control Register
(SMSR/SMCR), 4-56 to 4-59
SID8 bit, 4-47
SIDLA bit, 4-48
signal transceivers. See transceivers.
slave state machine
MXI-2, 2-5
VMEbus, 2-4
slot detection, two-frame system, E-3
soft front panel. See VME-MXI-2
VXIplug&play soft front panel.
soft reset of registers
description, 4-1
incompatibilities between VME-MXI
and VME-MXI-2, D-5
specifications
electrical, A-4
environmental, A-3
MXIbus capability descriptions, A-1
performance, A-4
physical, A-3
requirements, A-3
VMEbus capability codes, A-2
SRIN bit, 4-22
SROUT bit, 4-23
START bit, 4-62
state machines
master
MXI-2, 2-4
VMEbus, 2-3
slave
MXI-2, 2-5
VMEbus, 2-4
STOP bit, 4-61
STOPS bit, 4-78
switches. See jumper and switch settings.
SYSFAIL bit, 4-34
sysfail inhibit, D-3
SYSRESET* signal, 4-1
system configuration.
See also configuration.
multiframe RM operation, 5-40 to 5-44
configuring A24 and A32
addressing windows, 5-44
configuring logical address
window, 5-40 to 5-41
example, 5-41 to 5-44
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