Chapter 4
Register Descriptions
© National Instruments Corporation
4-39
VME-MXI-2 User Manual
VMEbus Interrupt Acknowledge Register 2 (VIAR2)
VMEbus A16 Offset:
34 (hex)
Attributes:
Read Only
32, 16, 8-bit accessible
31
30
29
28
27
26
25
24
I2[31]
I2[30]
I2[29]
I2[28]
I2[27]
I2[26]
I2[25]
I2[24]
23
22
21
20
19
18
17
16
I2[23]
I2[22]
I2[21]
I2[20]
I2[19]
I2[18]
I2[17]
I2[16]
15
14
13
12
11
10
9
8
I2[15]
I2[14]
I2[13]
I2[12]
I2[11]
I2[10]
I2[9]
I2[8]
7
6
5
4
3
2
1
0
I2[7]
I2[6]
I2[5]
I2[4]
I2[3]
I2[2]
I2[1]
I2[0]
This register generates a VMEbus Interrupt Acknowledge (IACK) cycle for interrupt
level 2 when read from the MXIbus and returns the Status ID received from the
interrupter. It can generate 32-bit, 16-bit, or 8-bit IACK cycles. Generating an 8-bit
IACK cycle requires reading offset 35 (hex). When read from the VMEbus, this register
does not generate an IACK cycle and returns FFFFFFFF (hex).
Bit
Mnemonic
Description
31-0
I2[31:0]
Level 2 Interrupter Status ID
These bits return the Status ID received during
the IACK cycle.
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