PROCEDURE CALLS
7-7
7
7.1.3.2
Return Operation
A return from any call type — explicit or implicit — is always initiated with a return (
ret
)
instruction. On a return, the processor performs these operations:
1.
The current stack frame and local registers are deallocated by loading the FP register with
the value of the PFP register.
2.
The local registers for the return target procedure are retrieved. The registers are usually read
from the local register cache; however, in some cases, these registers have been flushed from
register cache to memory and must be read directly from the save area in the stack frame.
3.
The processor sets the instruction pointer to the value of the RIP register.
Upon completion of these steps, the processor executes the instruction to which it returns. The
frames created before the
ret
instruction was executed are overwritten by later implicit or explicit
call operations.
7.1.4
Caching
Local Register Sets
Actual implementations of the i960 architecture may cache some number of local register sets
within the processor to improve performance. Local registers are typically saved and restored from
the local register cache when calls and returns are executed. Other overhead associated with a call
or return is performed in parallel with this data movement.
When the number of nested procedures exceeds local register cache size, local register sets must at times
be saved to (and restored from) their associated save areas in the procedure stack. Because these
operations require access to external memory, this local cache miss affects call and return performance.
When a call is made and no frames are available in the register cache, a register set in the cache must
be saved to external memory to make room for the current set of local registers in the cache (see
section 4.2, “LOCAL REGISTER CACHE” (pg. 4-2)
). This action is referred to as a frame spill.
The oldest set of local registers stored in the cache is spilled to the associated local register save area
in the procedure stack.
Figure 7-2
illustrates a call operation with and without a frame spill.
Similarly, when a return is made and the local register set for the target procedure is not available
in the cache, these local registers must be retrieved from the procedure stack in memory. This
operation is referred to as a frame fill.
Figure 7-3
illustrates return operations with and without
frame fills.
The
flushreg
instruction (described in
section 6.2.30, “flushreg” (pg. 6-54)
) writes all local register
sets (except the current one) to their associated stack frames in memory. The register cache is then
invalidated, meaning that all flushed register sets must be restored from their save areas in memory.
Summary of Contents for i960 Jx
Page 1: ...Release Date December 1997 Order Number 272483 002 i960 Jx Microprocessor Developer s Manual ...
Page 24: ......
Page 25: ...1 INTRODUCTION ...
Page 26: ......
Page 35: ...2 DATA TYPES AND MEMORY ADDRESSING MODES ...
Page 36: ......
Page 46: ......
Page 47: ...3 PROGRAMMING ENVIRONMENT ...
Page 48: ......
Page 73: ...4 CACHE AND ON CHIP DATA RAM ...
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Page 85: ...5 INSTRUCTION SET OVERVIEW ...
Page 86: ......
Page 111: ...6 INSTRUCTION SET REFERENCE ...
Page 112: ......
Page 233: ...7 PROCEDURE CALLS ...
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Page 257: ...8 FAULTS ...
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Page 291: ...9 TRACING AND DEBUGGING ...
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Page 309: ...10 TIMERS ...
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Page 325: ...11 INTERRUPTS ...
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Page 369: ...12 INITIALIZATION AND SYSTEM REQUIREMENTS ...
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Page 413: ...13 MEMORY CONFIGURATION ...
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Page 429: ...14 EXTERNAL BUS ...
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Page 469: ...15 TEST FEATURES ...
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Page 493: ...A CONSIDERATIONS FOR WRITING PORTABLE CODE ...
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Page 503: ...B OPCODES AND EXECUTION TIMES ...
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Page 515: ...C MACHINE LEVEL INSTRUCTION FORMATS ...
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Page 523: ...D REGISTER AND DATA STRUCTURES ...
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Page 551: ...GLOSSARY ...
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Page 561: ...INDEX ...
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