•
The power management activity is ongoing during the device configuration. For more information, refer to the Intel Agilex
Power Management User Guide.
•
The SDM drives the
CONF_DONE
pin high after successfully receiving full bitstream.
•
The
CONF_DONE
pin signals an external host that bitstream transfer is successful.
Failed FPGA Configuration
•
A low pulse on the
nSTATUS
pin indicates a configuration error.
•
An internal device wipe occurs followed by errors requiring reconfiguration.
•
After a low pulse indicating an error, configuration stops. The
nSTATUS
pin remains high.
•
Following an error, the SDM drives
nSTATUS
low after the external host drives
nCONFIG
low.
•
The device enters Idle state after the
nSTATUS
pin recovers to initial pre-configuration low state.
User Mode
•
The SDM drives the
INIT_DONE
pin high after initializing internal registers and releases GPIO pins from the high
impedance state. The device enters user mode. After
CONF_DONE
asserts and before
INIT_DONE
asserts, parts of the
device start to enter user mode. The assertion of
INIT_DONE
indicates that the entire device entered user mode. Intel
requires you to include the Reset Release in your design. Use the
nINIT_DONE
output of the Reset Release Intel FPGA IP
to hold your application logic in the reset state until the entire FPGA fabric is in user mode. Failure to include this IP in
your design may result in intermittent application logic failures.
•
The
nCONFIG
pin should remain high in user mode.
•
You may re-configure the device by driving
nCONFIG
pin from low to high.
Device Clean
•
In the Device Clean state the design stops functioning.
•
Device cleaning zeros out all configuration data.
•
The Intel Agilex device drives
CONF_DONE
and
INIT_DONE
low.
•
The SDM drives the
nSTATUS
pin low when device cleaning completes.
Related Information
Intel Agilex Power Management User Guide
2. Intel Agilex Configuration Details
683673 | 2021.10.29
Intel
®
Agilex
™
Configuration User Guide
25
