The section pointers must match the actual location of the FPGA image in flash. Two options are available to meet this
requirement:
•
You can generate the application image to match the actual location in quad SPI flash memory. This option may not be
practical as different systems may have a different set of updates applied, which may result in different slots being
suitable to store the new application image.
•
You can generate the application image as if it is located at address zero, then update the pointers to match the actual
location.
— In Intel Quartus Prime software version 21.1 or later, a Use relative address option is the default option to generate
a single application bitstream. You do not have to specify the start address since you can program the image to any
available location in the QSPI flash memory. To load the image, you must correctly point to the starting address of the
stored image in the flash memory.
If you choose to disable this option, unselect the Use relative address checkbox and provide the Start address for
the image in flash memory. For more information, refer to Generating an Application Image.
When using the HPS to manage RSU, both U-Boot and LIBRSU clients implement the below procedure to relocate application
images targeting address zero in the actual destination slot address.
The procedure to update the pointers from an application image created for
INITIAL_ADDRESS
to
NEW_ADDRESS is
:
1. Create the application image, targeting the
INITIAL_ADDRESS
.
2. Read the 32-bit value from offset 0x1F00 of the application image to determine the number of sections.
3. For
<s>= 1 to number_of_sections
:
a.
section_pointer
= read the 64-bit section pointer from (s * 8)
b. Subtract
INITIAL_ADDRESS
from
section_pointer
c. Add
NEW_ADDRESS
to
section_pointer
d. Store updated
section_pointer
4. Recompute the CRC32 for addresses 0x1000 to 0x1FFB. Store the new value at offset 0x1FFC. The CRC32 value must be
computed on a copy of the data using the following procedure:
a. Swap the bits of each byte so that the bits occur in reverse order and compute the CRC.
b. Swap the bytes of the computed CRC32 value to appear in reverse order.
c. Swap the bits in each byte of the CRC32 value.
d. Write the CRC32 value to flash.
5. Remote System Update (RSU)
683673 | 2021.10.29
Intel
®
Agilex
™
Configuration User Guide
181
